src/lte/model/rr-ff-mac-scheduler.cc
author Marco Miozzo <marco.miozzo@cttc.es>
Tue, 06 Nov 2012 17:42:40 +0100
changeset 9374 77f6eab81eac
parent 9372 d6ccea47ee2b
child 9376 4fa6b971e01f
permissions -rw-r--r--
Run check-style and polish logs on RR and PF schedulers
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/* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */
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/*
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 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC)
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation;
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 *
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 * Author: Marco Miozzo <marco.miozzo@cttc.es>
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 */
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#ifdef __FreeBSD__
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#define log2(x) (log (x) / M_LN2)
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#endif /* __FreeBSD__ */
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#include <ns3/log.h>
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#include <ns3/pointer.h>
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#include <set>
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#include <ns3/lte-amc.h>
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#include <ns3/rr-ff-mac-scheduler.h>
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#include <ns3/simulator.h>
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#include <ns3/lte-common.h>
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#include <ns3/lte-vendor-specific-parameters.h>
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#include <ns3/boolean.h>
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NS_LOG_COMPONENT_DEFINE ("RrFfMacScheduler");
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namespace ns3 {
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int Type0AllocationRbg[4] = {
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  10,       // RGB size 1
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  26,       // RGB size 2
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  63,       // RGB size 3
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  110       // RGB size 4
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};  // see table 7.1.6.1-1 of 36.213
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NS_OBJECT_ENSURE_REGISTERED (RrFfMacScheduler);
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class RrSchedulerMemberCschedSapProvider : public FfMacCschedSapProvider
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{
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public:
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  RrSchedulerMemberCschedSapProvider (RrFfMacScheduler* scheduler);
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  // inherited from FfMacCschedSapProvider
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  virtual void CschedCellConfigReq (const struct CschedCellConfigReqParameters& params);
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  virtual void CschedUeConfigReq (const struct CschedUeConfigReqParameters& params);
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  virtual void CschedLcConfigReq (const struct CschedLcConfigReqParameters& params);
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  virtual void CschedLcReleaseReq (const struct CschedLcReleaseReqParameters& params);
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  virtual void CschedUeReleaseReq (const struct CschedUeReleaseReqParameters& params);
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private:
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  RrSchedulerMemberCschedSapProvider ();
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  RrFfMacScheduler* m_scheduler;
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};
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RrSchedulerMemberCschedSapProvider::RrSchedulerMemberCschedSapProvider ()
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{
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}
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RrSchedulerMemberCschedSapProvider::RrSchedulerMemberCschedSapProvider (RrFfMacScheduler* scheduler) : m_scheduler (scheduler)
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{
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}
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void
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RrSchedulerMemberCschedSapProvider::CschedCellConfigReq (const struct CschedCellConfigReqParameters& params)
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{
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  m_scheduler->DoCschedCellConfigReq (params);
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}
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void
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RrSchedulerMemberCschedSapProvider::CschedUeConfigReq (const struct CschedUeConfigReqParameters& params)
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{
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  m_scheduler->DoCschedUeConfigReq (params);
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}
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void
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RrSchedulerMemberCschedSapProvider::CschedLcConfigReq (const struct CschedLcConfigReqParameters& params)
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{
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  m_scheduler->DoCschedLcConfigReq (params);
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}
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void
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RrSchedulerMemberCschedSapProvider::CschedLcReleaseReq (const struct CschedLcReleaseReqParameters& params)
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{
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  m_scheduler->DoCschedLcReleaseReq (params);
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}
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void
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RrSchedulerMemberCschedSapProvider::CschedUeReleaseReq (const struct CschedUeReleaseReqParameters& params)
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{
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  m_scheduler->DoCschedUeReleaseReq (params);
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}
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class RrSchedulerMemberSchedSapProvider : public FfMacSchedSapProvider
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{
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public:
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  RrSchedulerMemberSchedSapProvider (RrFfMacScheduler* scheduler);
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  // inherited from FfMacSchedSapProvider
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  virtual void SchedDlRlcBufferReq (const struct SchedDlRlcBufferReqParameters& params);
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  virtual void SchedDlPagingBufferReq (const struct SchedDlPagingBufferReqParameters& params);
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  virtual void SchedDlMacBufferReq (const struct SchedDlMacBufferReqParameters& params);
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  virtual void SchedDlTriggerReq (const struct SchedDlTriggerReqParameters& params);
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  virtual void SchedDlRachInfoReq (const struct SchedDlRachInfoReqParameters& params);
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  virtual void SchedDlCqiInfoReq (const struct SchedDlCqiInfoReqParameters& params);
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  virtual void SchedUlTriggerReq (const struct SchedUlTriggerReqParameters& params);
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  virtual void SchedUlNoiseInterferenceReq (const struct SchedUlNoiseInterferenceReqParameters& params);
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  virtual void SchedUlSrInfoReq (const struct SchedUlSrInfoReqParameters& params);
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  virtual void SchedUlMacCtrlInfoReq (const struct SchedUlMacCtrlInfoReqParameters& params);
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  virtual void SchedUlCqiInfoReq (const struct SchedUlCqiInfoReqParameters& params);
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private:
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  RrSchedulerMemberSchedSapProvider ();
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  RrFfMacScheduler* m_scheduler;
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};
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RrSchedulerMemberSchedSapProvider::RrSchedulerMemberSchedSapProvider ()
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{
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}
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RrSchedulerMemberSchedSapProvider::RrSchedulerMemberSchedSapProvider (RrFfMacScheduler* scheduler)
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  : m_scheduler (scheduler)
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{
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlRlcBufferReq (const struct SchedDlRlcBufferReqParameters& params)
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{
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  m_scheduler->DoSchedDlRlcBufferReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlPagingBufferReq (const struct SchedDlPagingBufferReqParameters& params)
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{
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  m_scheduler->DoSchedDlPagingBufferReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlMacBufferReq (const struct SchedDlMacBufferReqParameters& params)
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{
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  m_scheduler->DoSchedDlMacBufferReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlTriggerReq (const struct SchedDlTriggerReqParameters& params)
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{
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  m_scheduler->DoSchedDlTriggerReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlRachInfoReq (const struct SchedDlRachInfoReqParameters& params)
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{
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  m_scheduler->DoSchedDlRachInfoReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedDlCqiInfoReq (const struct SchedDlCqiInfoReqParameters& params)
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{
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  m_scheduler->DoSchedDlCqiInfoReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedUlTriggerReq (const struct SchedUlTriggerReqParameters& params)
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{
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  m_scheduler->DoSchedUlTriggerReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedUlNoiseInterferenceReq (const struct SchedUlNoiseInterferenceReqParameters& params)
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{
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  m_scheduler->DoSchedUlNoiseInterferenceReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedUlSrInfoReq (const struct SchedUlSrInfoReqParameters& params)
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{
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  m_scheduler->DoSchedUlSrInfoReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedUlMacCtrlInfoReq (const struct SchedUlMacCtrlInfoReqParameters& params)
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{
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  m_scheduler->DoSchedUlMacCtrlInfoReq (params);
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}
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void
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RrSchedulerMemberSchedSapProvider::SchedUlCqiInfoReq (const struct SchedUlCqiInfoReqParameters& params)
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{
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  m_scheduler->DoSchedUlCqiInfoReq (params);
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}
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RrFfMacScheduler::RrFfMacScheduler ()
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  :   m_cschedSapUser (0),
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    m_schedSapUser (0),
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    m_nextRntiDl (0),
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    m_nextRntiUl (0)
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{
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  m_amc = CreateObject <LteAmc> ();
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  m_cschedSapProvider = new RrSchedulerMemberCschedSapProvider (this);
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  m_schedSapProvider = new RrSchedulerMemberSchedSapProvider (this);
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}
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RrFfMacScheduler::~RrFfMacScheduler ()
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{
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  NS_LOG_FUNCTION (this);
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}
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void
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RrFfMacScheduler::DoDispose ()
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{
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  NS_LOG_FUNCTION (this);
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  m_dlHarqProcessesDciBuffer.clear ();
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  m_dlHarqProcessesRlcPduListBuffer.clear ();
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  m_dlInfoListBuffered.clear ();
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  m_ulHarqCurrentProcessId.clear ();
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  m_ulHarqProcessesStatus.clear ();
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  m_ulHarqProcessesDciBuffer.clear ();
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  delete m_cschedSapProvider;
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  delete m_schedSapProvider;
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}
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TypeId
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RrFfMacScheduler::GetTypeId (void)
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{
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  static TypeId tid = TypeId ("ns3::RrFfMacScheduler")
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    .SetParent<FfMacScheduler> ()
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    .AddConstructor<RrFfMacScheduler> ()
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    .AddAttribute ("CqiTimerThreshold",
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                   "The number of TTIs a CQI is valid (default 1000 - 1 sec.)",
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                   UintegerValue (1000),
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                   MakeUintegerAccessor (&RrFfMacScheduler::m_cqiTimersThreshold),
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                   MakeUintegerChecker<uint32_t> ())
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    .AddAttribute ("HarqEnabled",
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                   "Activate/Deactivate the HARQ [by default is active].",
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                   BooleanValue (true),
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                   MakeBooleanAccessor (&RrFfMacScheduler::m_harqOn),
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                   MakeBooleanChecker ())
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  ;
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  return tid;
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}
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void
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RrFfMacScheduler::SetFfMacCschedSapUser (FfMacCschedSapUser* s)
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{
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  m_cschedSapUser = s;
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}
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void
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RrFfMacScheduler::SetFfMacSchedSapUser (FfMacSchedSapUser* s)
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{
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  m_schedSapUser = s;
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}
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FfMacCschedSapProvider*
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RrFfMacScheduler::GetFfMacCschedSapProvider ()
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{
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  return m_cschedSapProvider;
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}
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FfMacSchedSapProvider*
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RrFfMacScheduler::GetFfMacSchedSapProvider ()
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{
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  return m_schedSapProvider;
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}
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void
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RrFfMacScheduler::DoCschedCellConfigReq (const struct FfMacCschedSapProvider::CschedCellConfigReqParameters& params)
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{
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  NS_LOG_FUNCTION (this);
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  // Read the subset of parameters used
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  m_cschedCellConfig = params;
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  FfMacCschedSapUser::CschedUeConfigCnfParameters cnf;
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  cnf.m_result = SUCCESS;
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  m_cschedSapUser->CschedUeConfigCnf (cnf);
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  return;
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}
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void
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RrFfMacScheduler::DoCschedUeConfigReq (const struct FfMacCschedSapProvider::CschedUeConfigReqParameters& params)
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{
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  NS_LOG_FUNCTION (this << " RNTI " << params.m_rnti << " txMode " << (uint16_t)params.m_transmissionMode);
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  std::map <uint16_t,uint8_t>::iterator it = m_uesTxMode.find (params.m_rnti);
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  if (it == m_uesTxMode.end ())
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    {
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      m_uesTxMode.insert (std::pair <uint16_t, double> (params.m_rnti, params.m_transmissionMode));
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      // generate HARQ buffers
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      m_dlHarqCurrentProcessId.insert (std::pair <uint16_t,uint8_t > (params.m_rnti, 0));
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      DlHarqProcessesStatus_t dlHarqPrcStatus;
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      dlHarqPrcStatus.resize (8,0);
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      m_dlHarqProcessesStatus.insert (std::pair <uint16_t, DlHarqProcessesStatus_t> (params.m_rnti, dlHarqPrcStatus));
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      DlHarqProcessesDciBuffer_t dlHarqdci;
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      dlHarqdci.resize (8);
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      m_dlHarqProcessesDciBuffer.insert (std::pair <uint16_t, DlHarqProcessesDciBuffer_t> (params.m_rnti, dlHarqdci));
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      DlHarqRlcPduListBuffer_t dlHarqRlcPdu;
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      dlHarqRlcPdu.resize (2);
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      dlHarqRlcPdu.at (0).resize (8);
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      dlHarqRlcPdu.at (1).resize (8);
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      m_dlHarqProcessesRlcPduListBuffer.insert (std::pair <uint16_t, DlHarqRlcPduListBuffer_t> (params.m_rnti, dlHarqRlcPdu));
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   328
      m_ulHarqCurrentProcessId.insert (std::pair <uint16_t,uint8_t > (params.m_rnti, 0));
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   329
      UlHarqProcessesStatus_t ulHarqPrcStatus;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   330
      ulHarqPrcStatus.resize (8,0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   331
      m_ulHarqProcessesStatus.insert (std::pair <uint16_t, UlHarqProcessesStatus_t> (params.m_rnti, ulHarqPrcStatus));
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   332
      UlHarqProcessesDciBuffer_t ulHarqdci;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   333
      ulHarqdci.resize (8);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   334
      m_ulHarqProcessesDciBuffer.insert (std::pair <uint16_t, UlHarqProcessesDciBuffer_t> (params.m_rnti, ulHarqdci));
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   335
    }
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   336
  else
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   337
    {
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   338
      (*it).second = params.m_transmissionMode;
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   339
    }
7886
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parents:
diff changeset
   340
  return;
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parents:
diff changeset
   341
}
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parents:
diff changeset
   342
b65c16d4da83 LENA project first public release
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parents:
diff changeset
   343
void
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diff changeset
   344
RrFfMacScheduler::DoCschedLcConfigReq (const struct FfMacCschedSapProvider::CschedLcConfigReqParameters& params)
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parents:
diff changeset
   345
{
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parents:
diff changeset
   346
  NS_LOG_FUNCTION (this);
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parents:
diff changeset
   347
  // Not used at this stage
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parents:
diff changeset
   348
  return;
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parents:
diff changeset
   349
}
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parents:
diff changeset
   350
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parents:
diff changeset
   351
void
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parents:
diff changeset
   352
RrFfMacScheduler::DoCschedLcReleaseReq (const struct FfMacCschedSapProvider::CschedLcReleaseReqParameters& params)
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parents:
diff changeset
   353
{
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parents:
diff changeset
   354
  NS_LOG_FUNCTION (this);
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parents:
diff changeset
   355
  // TODO: Implementation of the API
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parents:
diff changeset
   356
  return;
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parents:
diff changeset
   357
}
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parents:
diff changeset
   358
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parents:
diff changeset
   359
void
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parents:
diff changeset
   360
RrFfMacScheduler::DoCschedUeReleaseReq (const struct FfMacCschedSapProvider::CschedUeReleaseReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   361
{
b65c16d4da83 LENA project first public release
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parents:
diff changeset
   362
  NS_LOG_FUNCTION (this);
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parents:
diff changeset
   363
  // TODO: Implementation of the API
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parents:
diff changeset
   364
  return;
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parents:
diff changeset
   365
}
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parents:
diff changeset
   366
b65c16d4da83 LENA project first public release
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parents:
diff changeset
   367
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parents:
diff changeset
   368
void
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parents:
diff changeset
   369
RrFfMacScheduler::DoSchedDlRlcBufferReq (const struct FfMacSchedSapProvider::SchedDlRlcBufferReqParameters& params)
b65c16d4da83 LENA project first public release
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parents:
diff changeset
   370
{
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parents:
diff changeset
   371
  NS_LOG_FUNCTION (this << params.m_rnti << (uint32_t) params.m_logicalChannelIdentity);
b65c16d4da83 LENA project first public release
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parents:
diff changeset
   372
  // API generated by RLC for updating RLC parameters on a LC (tx and retx queues)
8413
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   373
  std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it = m_rlcBufferReq.begin ();
7972
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   374
  bool newLc = true;
8413
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   375
  while (it != m_rlcBufferReq.end ())
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   376
    {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   377
      // remove old entries of this UE-LC
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   378
      if (((*it).m_rnti == params.m_rnti)&&((*it).m_logicalChannelIdentity == params.m_logicalChannelIdentity))
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   379
        {
8412
018034c10dec fixed RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8342
diff changeset
   380
          it = m_rlcBufferReq.erase (it);
7972
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   381
          newLc = false;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   382
        }
8413
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   383
      else
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   384
        {
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   385
          ++it;
3387abb7a77c better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents: 8412
diff changeset
   386
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   387
    }
7972
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   388
  // add the new parameters
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   389
  m_rlcBufferReq.insert (it, params);
7972
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   390
  // initialize statistics of the flow in case of new flows
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   391
  if (newLc == true)
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   392
    {
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   393
      m_p10CqiRxed.insert ( std::pair<uint16_t, uint8_t > (params.m_rnti, 1)); // only codeword 0 at this stage (SISO)
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   394
      // initialized to 1 (i.e., the lowest value for transmitting a signal)
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   395
      m_p10CqiTimers.insert ( std::pair<uint16_t, uint32_t > (params.m_rnti, m_cqiTimersThreshold));
7972
6d24eb482e41 LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7966
diff changeset
   396
    }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   397
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   398
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   399
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   400
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   401
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   402
RrFfMacScheduler::DoSchedDlPagingBufferReq (const struct FfMacSchedSapProvider::SchedDlPagingBufferReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   403
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   404
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   405
  // TODO: Implementation of the API
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   406
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   407
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   408
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   409
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   410
RrFfMacScheduler::DoSchedDlMacBufferReq (const struct FfMacSchedSapProvider::SchedDlMacBufferReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   411
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   412
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   413
  // TODO: Implementation of the API
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   414
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   415
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   416
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   417
int
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   418
RrFfMacScheduler::GetRbgSize (int dlbandwidth)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   419
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   420
  for (int i = 0; i < 4; i++)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   421
    {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   422
      if (dlbandwidth < Type0AllocationRbg[i])
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   423
        {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   424
          return (i + 1);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   425
        }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   426
    }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   427
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   428
  return (-1);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   429
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   430
8320
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   431
bool
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   432
RrFfMacScheduler::SortRlcBufferReq (FfMacSchedSapProvider::SchedDlRlcBufferReqParameters i,FfMacSchedSapProvider::SchedDlRlcBufferReqParameters j)
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   433
{
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   434
  return (i.m_rnti < j.m_rnti);
8320
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   435
}
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   436
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   437
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   438
uint8_t
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   439
RrFfMacScheduler::HarqProcessAvailability (uint16_t rnti)
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   440
{
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   441
  NS_LOG_FUNCTION (this << rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   442
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   443
  std::map <uint16_t, uint8_t>::iterator it = m_dlHarqCurrentProcessId.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   444
  if (it == m_dlHarqCurrentProcessId.end ())
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   445
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   446
      NS_FATAL_ERROR ("No Process Id found for this RNTI " << rnti);
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   447
    }
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   448
  std::map <uint16_t, DlHarqProcessesStatus_t>::iterator itStat = m_dlHarqProcessesStatus.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   449
  if (itStat == m_dlHarqProcessesStatus.end ())
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   450
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   451
      NS_FATAL_ERROR ("No Process Id Statusfound for this RNTI " << rnti);
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   452
    }
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   453
  uint8_t i = (*it).second;
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   454
  do
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   455
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   456
      i = (i + 1) % HARQ_PROC_NUM;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   457
    }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   458
  while ( ((*itStat).second.at (i) != 0)&&(i != (*it).second));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   459
  if ((*itStat).second.at (i) == 0)
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   460
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   461
      return (true);
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   462
    }
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   463
  else
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   464
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   465
      return (false); // return a not valid harq proc id
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   466
    }
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   467
}
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   468
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   469
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   470
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   471
uint8_t
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   472
RrFfMacScheduler::UpdateHarqProcessId (uint16_t rnti)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   473
{
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   474
  NS_LOG_FUNCTION (this << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   475
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   476
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   477
  if (m_harqOn == false)
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   478
    {
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   479
      return (0);
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   480
    }
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   481
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   482
  std::map <uint16_t, uint8_t>::iterator it = m_dlHarqCurrentProcessId.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   483
  if (it == m_dlHarqCurrentProcessId.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   484
    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   485
      NS_FATAL_ERROR ("No Process Id found for this RNTI " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   486
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   487
  std::map <uint16_t, DlHarqProcessesStatus_t>::iterator itStat = m_dlHarqProcessesStatus.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   488
  if (itStat == m_dlHarqProcessesStatus.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   489
    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   490
      NS_FATAL_ERROR ("No Process Id Statusfound for this RNTI " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   491
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   492
  uint8_t i = (*it).second;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   493
  do
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   494
    {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   495
      i = (i + 1) % HARQ_PROC_NUM;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   496
    }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   497
  while ( ((*itStat).second.at (i) != 0)&&(i != (*it).second));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   498
  if ((*itStat).second.at (i) == 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   499
    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   500
      (*it).second = i;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   501
      (*itStat).second.at (i) = 1;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   502
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   503
  else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   504
    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   505
      return (9); // return a not valid harq proc id
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   506
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   507
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   508
  return ((*it).second);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   509
}
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   510
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   511
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   512
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   513
RrFfMacScheduler::DoSchedDlTriggerReq (const struct FfMacSchedSapProvider::SchedDlTriggerReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   514
{
8728
5a99218bfd1b Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents: 8726
diff changeset
   515
  NS_LOG_FUNCTION (this << " DL Frame no. " << (params.m_sfnSf >> 4) << " subframe no. " << (0xF & params.m_sfnSf));
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   516
  // API generated by RLC for triggering the scheduling of a DL subframe
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   517
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   518
  RefreshDlCqiMaps ();
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   519
  int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   520
  int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   521
  FfMacSchedSapUser::SchedDlConfigIndParameters ret;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   522
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   523
  // Generate RBGs map
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   524
  std::vector <bool> rbgMap;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   525
  uint16_t rbgAllocatedNum = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   526
  std::set <uint16_t> rntiAllocated;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   527
  rbgMap.resize (m_cschedCellConfig.m_dlBandwidth / rbgSize, false);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   528
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   529
  // Process DL HARQ feedback
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   530
  // retrieve past HARQ retx buffered
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   531
  if (m_dlInfoListBuffered.size () > 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   532
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   533
      if (params.m_dlInfoList.size () > 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   534
        {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   535
          NS_LOG_INFO (this << " Received DL-HARQ feedback");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   536
          m_dlInfoListBuffered.insert (m_dlInfoListBuffered.end (), params.m_dlInfoList.begin (), params.m_dlInfoList.end ());
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   537
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   538
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   539
  else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   540
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   541
      if (params.m_dlInfoList.size () > 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   542
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   543
          m_dlInfoListBuffered = params.m_dlInfoList;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   544
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   545
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   546
  if (m_harqOn == false)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   547
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   548
      // Ignore HARQ feedback
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   549
      m_dlInfoListBuffered.clear ();
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   550
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   551
  std::vector <struct DlInfoListElement_s> dlInfoListUntxed;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   552
  for (uint8_t i = 0; i < m_dlInfoListBuffered.size (); i++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   553
    {
9372
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   554
      std::set <uint16_t>::iterator itRnti = rntiAllocated.find (m_dlInfoListBuffered.at (i).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   555
      if (itRnti != rntiAllocated.end ())
9372
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   556
        {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   557
          // RNTI already allocated for retx
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   558
          continue;
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   559
        }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   560
      uint8_t nLayers = m_dlInfoListBuffered.at (i).m_harqStatus.size ();
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   561
      std::vector <bool> retx;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   562
      NS_LOG_INFO (this << " Processing DLHARQ feedback");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   563
      if (nLayers == 1)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   564
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   565
          retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlInfoListElement_s::NACK);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   566
          retx.push_back (false);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   567
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   568
      else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   569
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   570
          retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlInfoListElement_s::NACK);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   571
          retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (1) == DlInfoListElement_s::NACK);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   572
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   573
      if (retx.at (0) || retx.at (1))
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   574
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   575
          // retrieve HARQ process information
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   576
          uint16_t rnti = m_dlInfoListBuffered.at (i).m_rnti;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   577
          uint8_t harqId = m_dlInfoListBuffered.at (i).m_harqProcessId;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   578
          NS_LOG_INFO (this << " HARQ retx RNTI " << rnti << " harqId " << (uint16_t)harqId);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   579
          std::map <uint16_t, DlHarqProcessesDciBuffer_t>::iterator itHarq = m_dlHarqProcessesDciBuffer.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   580
          if (itHarq == m_dlHarqProcessesDciBuffer.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   581
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   582
              NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   583
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   584
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   585
          DlDciListElement_s dci = (*itHarq).second.at (harqId);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   586
          int rv = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   587
          if (dci.m_rv.size () == 1)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   588
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   589
              rv = dci.m_rv.at (0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   590
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   591
          else
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   592
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   593
              rv = (dci.m_rv.at (0) > dci.m_rv.at (1) ? dci.m_rv.at (0) : dci.m_rv.at (1));
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   594
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   595
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   596
          if (rv == 3)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   597
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   598
              // maximum number of retx reached -> drop process
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   599
              NS_LOG_INFO ("Max number of retransmissions reached -> drop process");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   600
              std::map <uint16_t, DlHarqProcessesStatus_t>::iterator it = m_dlHarqProcessesStatus.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   601
              if (it == m_dlHarqProcessesStatus.end ())
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   602
                {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   603
                  NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << m_dlInfoListBuffered.at (i).m_rnti);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   604
                }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   605
              (*it).second.at (harqId) = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   606
              std::map <uint16_t, DlHarqRlcPduListBuffer_t>::iterator itRlcPdu =  m_dlHarqProcessesRlcPduListBuffer.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   607
              if (itRlcPdu == m_dlHarqProcessesRlcPduListBuffer.end ())
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   608
                {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   609
                  NS_FATAL_ERROR ("Unable to find RlcPdcList in HARQ buffer for RNTI " << m_dlInfoListBuffered.at (i).m_rnti);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   610
                }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   611
              for (uint16_t k = 0; k < (*itRlcPdu).second.size (); k++)
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   612
                {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   613
                  (*itRlcPdu).second.at (k).at (harqId).clear ();
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   614
                }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   615
              continue;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   616
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   617
          // check the feasibility of retransmitting on the same RBGs
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   618
          // translate the DCI to Spectrum framework
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   619
          std::vector <int> dciRbg;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   620
          uint32_t mask = 0x1;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   621
          NS_LOG_INFO ("Original RBGs " << dci.m_rbBitmap << " rnti " << dci.m_rnti);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   622
          for (int j = 0; j < 32; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   623
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   624
              if (((dci.m_rbBitmap & mask) >> j) == 1)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   625
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   626
                  dciRbg.push_back (j);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   627
                  NS_LOG_INFO ("\t" << j);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   628
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   629
              mask = (mask << 1);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   630
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   631
          bool free = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   632
          for (uint8_t j = 0; j < dciRbg.size (); j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   633
            {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   634
              if (rbgMap.at (dciRbg.at (j)) == true)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   635
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   636
                  free = false;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   637
                  break;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   638
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   639
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   640
          if (free)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   641
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   642
              // use the same RBGs for the retx
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   643
              // reserve RBGs
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   644
              for (uint8_t j = 0; j < dciRbg.size (); j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   645
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   646
                  rbgMap.at (dciRbg.at (j)) = true;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   647
                  NS_LOG_INFO ("RBG " << dciRbg.at (j) << " assigned");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   648
                  rbgAllocatedNum++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   649
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   650
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   651
              NS_LOG_INFO (this << " Send retx in the same RBGs");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   652
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   653
          else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   654
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   655
              // find RBGs for sending HARQ retx
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   656
              uint8_t j = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   657
              uint8_t rbgId = (dciRbg.at (dciRbg.size () - 1) + 1) % rbgNum;
9358
7545f5294223 Bug-fix DoSchedDlTriggerReq:startRbg both in RR and PR erroneous initialization
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9352
diff changeset
   658
              uint8_t startRbg = dciRbg.at (dciRbg.size () - 1);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   659
              std::vector <bool> rbgMapCopy = rbgMap;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   660
              while ((j < dciRbg.size ())&&(startRbg != rbgId))
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   661
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   662
                  if (rbgMapCopy.at (rbgId) == false)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   663
                    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   664
                      rbgMapCopy.at (rbgId) = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   665
                      dciRbg.at (j) = rbgId;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   666
                      j++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   667
                    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   668
                  rbgId++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   669
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   670
              if (j == dciRbg.size ())
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   671
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   672
                  // find new RBGs -> update DCI map
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   673
                  uint32_t rbgMask = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   674
                  for (uint16_t k = 0; k < dciRbg.size (); k++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   675
                    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   676
                      rbgMask = rbgMask + (0x1 << dciRbg.at (k));
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   677
                      NS_LOG_INFO (this << " New allocated RBG " << dciRbg.at (k));
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   678
                      rbgAllocatedNum++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   679
                    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   680
                  dci.m_rbBitmap = rbgMask;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   681
                  rbgMap = rbgMapCopy;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   682
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   683
              else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   684
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   685
                  // HARQ retx cannot be performed on this TTI -> store it
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   686
                  dlInfoListUntxed.push_back (params.m_dlInfoList.at (i));
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   687
                  NS_LOG_INFO (this << " No resource for this retx -> buffer it");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   688
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   689
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   690
          // retrieve RLC PDU list for retx TBsize and update DCI
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   691
          BuildDataListElement_s newEl;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   692
          std::map <uint16_t, DlHarqRlcPduListBuffer_t>::iterator itRlcPdu =  m_dlHarqProcessesRlcPduListBuffer.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   693
          if (itRlcPdu == m_dlHarqProcessesRlcPduListBuffer.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   694
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   695
              NS_FATAL_ERROR ("Unable to find RlcPdcList in HARQ buffer for RNTI " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   696
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   697
          for (uint8_t j = 0; j < nLayers; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   698
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   699
              if (retx.at (j))
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   700
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   701
                  if (j >= dci.m_ndi.size ())
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   702
                    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   703
                      // for avoiding errors in MIMO transient phases
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   704
                      dci.m_ndi.push_back (0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   705
                      dci.m_rv.push_back (0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   706
                      dci.m_mcs.push_back (0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   707
                      dci.m_tbsSize.push_back (0);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   708
                      NS_LOG_INFO (this << " layer " << (uint16_t)j << " no txed (MIMO transition)");
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   709
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   710
                    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   711
                  else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   712
                    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   713
                      dci.m_ndi.at (j) = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   714
                      dci.m_rv.at (j)++;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   715
                      (*itHarq).second.at (harqId).m_rv.at (j)++;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   716
                      NS_LOG_INFO (this << " layer " << (uint16_t)j << " RV " << (uint16_t)dci.m_rv.at (j));
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   717
                    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   718
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   719
              else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   720
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   721
                  // empty TB of layer j
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   722
                  dci.m_ndi.at (j) = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   723
                  dci.m_rv.at (j) = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   724
                  dci.m_mcs.at (j) = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   725
                  dci.m_tbsSize.at (j) = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   726
                  NS_LOG_INFO (this << " layer " << (uint16_t)j << " no retx");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   727
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   728
            }
9372
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   729
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   730
          for (uint16_t k = 0; k < (*itRlcPdu).second.at (0).at (dci.m_harqProcess).size (); k++)
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   731
            {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   732
              std::vector <struct RlcPduListElement_s> rlcPduListPerLc;
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   733
              for (uint8_t j = 0; j < nLayers; j++)
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   734
                {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   735
                  if (retx.at (j))
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   736
                    {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   737
                      if (j < dci.m_ndi.size ())
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   738
                        {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   739
                          rlcPduListPerLc.push_back ((*itRlcPdu).second.at (j).at (dci.m_harqProcess).at (k));
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   740
                        }
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   741
                    }
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   742
                }
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   743
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   744
              if (rlcPduListPerLc.size () > 0)
9372
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   745
                {
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   746
                  newEl.m_rlcPduList.push_back (rlcPduListPerLc);
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   747
                }
d6ccea47ee2b Bugs-fix: avoid multiple retransmission attempts per UE and reorder the RLC PDUs list for retrasmission both in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9369
diff changeset
   748
            }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   749
          newEl.m_rnti = rnti;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   750
          newEl.m_dci = dci;
9360
197c71f20845 Bug-fix in RR and PF: update RV field in different harq retx
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9359
diff changeset
   751
          (*itHarq).second.at (harqId).m_rv = dci.m_rv;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   752
          ret.m_buildDataList.push_back (newEl);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   753
          rntiAllocated.insert (rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   754
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   755
      else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   756
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   757
          // update HARQ process status
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   758
          NS_LOG_INFO (this << " HARQ ACK UE " << m_dlInfoListBuffered.at (i).m_rnti);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   759
          std::map <uint16_t, DlHarqProcessesStatus_t>::iterator it = m_dlHarqProcessesStatus.find (m_dlInfoListBuffered.at (i).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   760
          if (it == m_dlHarqProcessesStatus.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   761
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   762
              NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << m_dlInfoListBuffered.at (i).m_rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   763
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   764
          (*it).second.at (m_dlInfoListBuffered.at (i).m_harqProcessId) = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   765
          std::map <uint16_t, DlHarqRlcPduListBuffer_t>::iterator itRlcPdu =  m_dlHarqProcessesRlcPduListBuffer.find (m_dlInfoListBuffered.at (i).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   766
          if (itRlcPdu == m_dlHarqProcessesRlcPduListBuffer.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   767
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   768
              NS_FATAL_ERROR ("Unable to find RlcPdcList in HARQ buffer for RNTI " << m_dlInfoListBuffered.at (i).m_rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   769
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   770
          for (uint16_t k = 0; k < (*itRlcPdu).second.size (); k++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   771
            {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   772
              (*itRlcPdu).second.at (k).at (m_dlInfoListBuffered.at (i).m_harqProcessId).clear ();
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   773
            }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   774
        }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   775
    }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   776
  m_dlInfoListBuffered.clear ();
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   777
  m_dlInfoListBuffered = dlInfoListUntxed;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   778
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   779
  // Get the actual active flows (queue!=0)
8320
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   780
  std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it;
756e0218720d Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8319
diff changeset
   781
  m_rlcBufferReq.sort (SortRlcBufferReq);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   782
  int nflows = 0;
8342
ae80a024c11e Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8321
diff changeset
   783
  int nTbs = 0;
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   784
  std::map <uint16_t,uint8_t> lcActivesPerRnti; // tracks how many active LCs per RNTI there are
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   785
  std::map <uint16_t,uint8_t>::iterator itLcRnti;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   786
  for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   787
    {
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   788
      NS_LOG_LOGIC (this << " User " << (*it).m_rnti << " LC " << (uint16_t)(*it).m_logicalChannelIdentity);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   789
      // remove old entries of this UE-LC
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   790
      std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).m_rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   791
      if ( (((*it).m_rlcTransmissionQueueSize > 0)
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   792
            || ((*it).m_rlcRetransmissionQueueSize > 0)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   793
            || ((*it).m_rlcStatusPduSize > 0))
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   794
           && (itRnti == rntiAllocated.end ())  // UE must not be allocated for HARQ retx
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   795
           && (HarqProcessAvailability ((*it).m_rnti))  ) // UE needs HARQ proc free
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   796
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   797
        {
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   798
          std::map <uint16_t,uint8_t>::iterator itCqi = m_p10CqiRxed.find ((*it).m_rnti);
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   799
          uint8_t cqi = 0;
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   800
          if (itCqi != m_p10CqiRxed.end ())
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   801
            {
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   802
              cqi = (*itCqi).second;
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   803
            }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   804
          else
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   805
            {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   806
              cqi = 1; // lowest value fro trying a transmission
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   807
            }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   808
          if (cqi != 0)
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   809
            {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   810
              // CQI == 0 means "out of range" (see table 7.2.3-1 of 36.213)
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   811
              nflows++;
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   812
              itLcRnti = lcActivesPerRnti.find ((*it).m_rnti);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   813
              if (itLcRnti != lcActivesPerRnti.end ())
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   814
                {
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   815
                  (*itLcRnti).second++;
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   816
                }
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   817
              else
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   818
                {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   819
                  lcActivesPerRnti.insert (std::pair<uint16_t, uint8_t > ((*it).m_rnti, 1));
8342
ae80a024c11e Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8321
diff changeset
   820
                  nTbs++;
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
   821
                }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   822
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
   823
            }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   824
        }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   825
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   826
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   827
  if (nflows == 0)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   828
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   829
      if (ret.m_buildDataList.size () > 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   830
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   831
          m_schedSapUser->SchedDlConfigInd (ret);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   832
        }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   833
      return;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   834
    }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   835
  // Divide the resource equally among the active users according to
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   836
  // Resource allocation type 0 (see sec 7.1.6.1 of 36.213)
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   837
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   838
  int rbgPerTb = (rbgNum - rbgAllocatedNum) / nTbs;
8342
ae80a024c11e Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8321
diff changeset
   839
  if (rbgPerTb == 0)
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   840
    {
8342
ae80a024c11e Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8321
diff changeset
   841
      rbgPerTb = 1;                // at least 1 rbg per TB (till available resource)
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   842
    }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   843
  int rbgAllocated = 0;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   844
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   845
  // round robin assignment to all UEs registered starting from the subsequent of the one
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   846
  // served last scheduling trigger event
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   847
  if (m_nextRntiDl != 0)
8020
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   848
    {
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   849
      for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++)
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   850
        {
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   851
          if ((*it).m_rnti == m_nextRntiDl)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   852
            {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   853
              break;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   854
            }
8020
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   855
        }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   856
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   857
      if (it == m_rlcBufferReq.end ())
8020
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   858
        {
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   859
          NS_LOG_ERROR (this << " no user found");
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   860
        }
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   861
    }
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   862
  else
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   863
    {
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   864
      it = m_rlcBufferReq.begin ();
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
   865
      m_nextRntiDl = (*it).m_rnti;
8020
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   866
    }
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   867
  std::map <uint16_t,uint8_t>::iterator itTxMode;
8020
fc705bc87348 Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7983
diff changeset
   868
  do
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   869
    {
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   870
      itLcRnti = lcActivesPerRnti.find ((*it).m_rnti);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   871
      std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   872
      if ((itLcRnti == lcActivesPerRnti.end ())||(itRnti != rntiAllocated.end ()))
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   873
        {
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   874
          // skip this entry (no active queue or yet allocated for HARQ)
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   875
          it++;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   876
          if (it == m_rlcBufferReq.end ())
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   877
            {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   878
              // restart from the first
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   879
              it = m_rlcBufferReq.begin ();
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   880
            }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   881
          continue;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   882
        }
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   883
      itTxMode = m_uesTxMode.find ((*it).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   884
      if (itTxMode == m_uesTxMode.end ())
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   885
        {
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   886
          NS_FATAL_ERROR ("No Transmission Mode info on user " << (*it).m_rnti);
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   887
        }
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   888
      int nLayer = TransmissionModesLayers::TxMode2LayerNum ((*itTxMode).second);
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   889
      int lcNum = (*itLcRnti).second;
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   890
      // create new BuildDataListElement_s for this RNTI
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   891
      BuildDataListElement_s newEl;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   892
      newEl.m_rnti = (*it).m_rnti;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   893
      // create the DlDciListElement_s
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   894
      DlDciListElement_s newDci;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   895
      newDci.m_rnti = (*it).m_rnti;
9359
55dee31410ac Update RR and PF schedulers for avoiding the allocation of UEs that do not have HARQ processes available for transmitting
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9358
diff changeset
   896
      newDci.m_harqProcess = UpdateHarqProcessId ((*it).m_rnti);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   897
      newDci.m_resAlloc = 0;
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   898
      newDci.m_rbBitmap = 0;
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   899
      std::map <uint16_t,uint8_t>::iterator itCqi = m_p10CqiRxed.find (newEl.m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   900
      for (uint8_t i = 0; i < nLayer; i++)
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   901
        {
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   902
          if (itCqi == m_p10CqiRxed.end ())
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   903
            {
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   904
              newDci.m_mcs.push_back (0); // no info on this user -> lowest MCS
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   905
            }
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   906
          else
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   907
            {
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   908
              newDci.m_mcs.push_back ( m_amc->GetMcsFromCqi ((*itCqi).second) );
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   909
            }
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   910
        }
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   911
      int tbSize = (m_amc->GetTbSizeFromMcs (newDci.m_mcs.at (0), rbgPerTb * rbgSize) / 8);
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   912
      uint16_t rlcPduSize = tbSize / lcNum;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   913
      while (lcNum > 0)
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   914
        {
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   915
          if ( ((*it).m_rlcTransmissionQueueSize > 0)
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   916
               || ((*it).m_rlcRetransmissionQueueSize > 0)
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   917
               || ((*it).m_rlcStatusPduSize > 0) )
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   918
            {
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   919
              std::vector <struct RlcPduListElement_s> newRlcPduLe;
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   920
              for (uint8_t j = 0; j < nLayer; j++)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   921
                {
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   922
                  RlcPduListElement_s newRlcEl;
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   923
                  newRlcEl.m_logicalChannelIdentity = (*it).m_logicalChannelIdentity;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   924
                  NS_LOG_INFO (this << "LCID " << (uint32_t) newRlcEl.m_logicalChannelIdentity << " size " << rlcPduSize << " ID " << (*it).m_rnti << " layer " << (uint16_t)j);
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   925
                  newRlcEl.m_size = rlcPduSize;
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   926
                  UpdateDlRlcBufferInfo ((*it).m_rnti, newRlcEl.m_logicalChannelIdentity, rlcPduSize);
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   927
                  newRlcPduLe.push_back (newRlcEl);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   928
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   929
                  if (m_harqOn == true)
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
   930
                    {
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   931
                      // store RLC PDU list for HARQ
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   932
                      std::map <uint16_t, DlHarqRlcPduListBuffer_t>::iterator itRlcPdu =  m_dlHarqProcessesRlcPduListBuffer.find ((*it).m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   933
                      if (itRlcPdu == m_dlHarqProcessesRlcPduListBuffer.end ())
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   934
                        {
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   935
                          NS_FATAL_ERROR ("Unable to find RlcPdcList in HARQ buffer for RNTI " << (*it).m_rnti);
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   936
                        }
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   937
                      (*itRlcPdu).second.at (j).at (newDci.m_harqProcess).push_back (newRlcEl);
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
   938
                    }
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   939
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   940
                }
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   941
              newEl.m_rlcPduList.push_back (newRlcPduLe);
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   942
              lcNum--;
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   943
            }
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   944
          it++;
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   945
          if (it == m_rlcBufferReq.end ())
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   946
            {
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   947
              // restart from the first
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   948
              it = m_rlcBufferReq.begin ();
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
   949
            }
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   950
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   951
      uint32_t rbgMask = 0;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   952
      uint16_t i = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   953
      NS_LOG_INFO (this << " DL - Allocate user " << newEl.m_rnti << " LCs " << (uint16_t)(*itLcRnti).second << " bytes " << tbSize << " mcs " << (uint16_t) newDci.m_mcs.at (0) << " harqId " << (uint16_t)newDci.m_harqProcess <<  " layers " << nLayer);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   954
      NS_LOG_DEBUG ("RBG:");
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   955
      while (i < rbgPerTb)
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   956
        {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   957
          if (rbgMap.at (rbgAllocated) == false)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   958
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   959
              rbgMask = rbgMask + (0x1 << rbgAllocated);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   960
              NS_LOG_DEBUG ("\t " << rbgAllocated);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   961
              i++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   962
              rbgMap.at (rbgAllocated) = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   963
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   964
          rbgAllocated++;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   965
        }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   966
      newDci.m_rbBitmap = rbgMask; // (32 bit bitmap see 7.1.6 of 36.213)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   967
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
   968
      for (int i = 0; i < nLayer; i++)
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   969
        {
7977
9a44dfd0056d LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7972
diff changeset
   970
          newDci.m_tbsSize.push_back (tbSize);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   971
          newDci.m_ndi.push_back (1);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   972
          newDci.m_rv.push_back (0);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   973
        }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   974
      newEl.m_dci = newDci;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   975
      if (m_harqOn == true)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   976
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   977
          // store DCI for HARQ
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   978
          std::map <uint16_t, DlHarqProcessesDciBuffer_t>::iterator itDci = m_dlHarqProcessesDciBuffer.find (newEl.m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
   979
          if (itDci == m_dlHarqProcessesDciBuffer.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   980
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   981
              NS_FATAL_ERROR ("Unable to find RNTI entry in DCI HARQ buffer for RNTI " << (*it).m_rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   982
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   983
          (*itDci).second.at (newDci.m_harqProcess) = newDci;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
   984
        }
7897
313a02778014 DL PF Scheduler
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7895
diff changeset
   985
      // ...more parameters -> ignored in this version
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   986
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   987
      ret.m_buildDataList.push_back (newEl);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   988
      if (rbgAllocated == rbgNum)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   989
        {
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
   990
          m_nextRntiDl = (*it).m_rnti; // store last RNTI served
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   991
          break;                       // no more RGB to be allocated
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   992
        }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   993
    }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
   994
  while ((*it).m_rnti != m_nextRntiDl);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   995
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   996
  ret.m_nrOfPdcchOfdmSymbols = 1;   // TODO: check correct value according the DCIs txed
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   997
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   998
  m_schedSapUser->SchedDlConfigInd (ret);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
   999
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1000
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1001
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1002
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1003
RrFfMacScheduler::DoSchedDlRachInfoReq (const struct FfMacSchedSapProvider::SchedDlRachInfoReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1004
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1005
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1006
  // TODO: Implementation of the API
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1007
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1008
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1009
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1010
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1011
RrFfMacScheduler::DoSchedDlCqiInfoReq (const struct FfMacSchedSapProvider::SchedDlCqiInfoReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1012
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1013
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1014
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1015
  std::map <uint16_t,uint8_t>::iterator it;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1016
  for (unsigned int i = 0; i < params.m_cqiList.size (); i++)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1017
    {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1018
      if ( params.m_cqiList.at (i).m_cqiType == CqiListElement_s::P10 )
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1019
        {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1020
          // wideband CQI reporting
7895
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1021
          std::map <uint16_t,uint8_t>::iterator it;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1022
          uint16_t rnti = params.m_cqiList.at (i).m_rnti;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1023
          it = m_p10CqiRxed.find (rnti);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1024
          if (it == m_p10CqiRxed.end ())
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1025
            {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1026
              // create the new entry
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1027
              m_p10CqiRxed.insert ( std::pair<uint16_t, uint8_t > (rnti, params.m_cqiList.at (i).m_wbCqi.at (0)) ); // only codeword 0 at this stage (SISO)
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1028
              // generate correspondent timer
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1029
              m_p10CqiTimers.insert ( std::pair<uint16_t, uint32_t > (rnti, m_cqiTimersThreshold));
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1030
            }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1031
          else
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1032
            {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1033
              // update the CQI value
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1034
              (*it).second = params.m_cqiList.at (i).m_wbCqi.at (0);
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1035
              // update correspondent timer
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1036
              std::map <uint16_t,uint32_t>::iterator itTimers;
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1037
              itTimers = m_p10CqiTimers.find (rnti);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1038
              (*itTimers).second = m_cqiTimersThreshold;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1039
            }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1040
        }
7895
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1041
      else if ( params.m_cqiList.at (i).m_cqiType == CqiListElement_s::A30 )
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1042
        {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1043
          // subband CQI reporting high layer configured
7895
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1044
          // Not used by RR Scheduler
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1045
        }
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1046
      else
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1047
        {
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1048
          NS_LOG_ERROR (this << " CQI type unknown");
f20bb71f9b71 Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7888
diff changeset
  1049
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1050
    }
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1051
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1052
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1053
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1054
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1055
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1056
RrFfMacScheduler::DoSchedUlTriggerReq (const struct FfMacSchedSapProvider::SchedUlTriggerReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1057
{
8729
74de12409ee5 Update m_macChTtiDelay fixed to 4 in UL (standard) and make schedulers unaware of channel delays (tests updated according to new delay)
mmiozzo
parents: 8728
diff changeset
  1058
  NS_LOG_FUNCTION (this << " Ul - Frame no. " << (params.m_sfnSf >> 4) << " subframe no. " << (0xF & params.m_sfnSf));
8080
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1059
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1060
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1061
  RefreshUlCqiMaps ();
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1062
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1063
  // Generate RBs map
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1064
  FfMacSchedSapUser::SchedUlConfigIndParameters ret;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1065
  std::vector <bool> rbMap;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1066
  uint16_t rbAllocatedNum = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1067
  std::set <uint16_t> rntiAllocated;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1068
  std::vector <uint16_t> rbgAllocationMap;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1069
  rbgAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1070
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1071
  rbMap.resize (m_cschedCellConfig.m_ulBandwidth, false);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1072
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1073
//   Process UL HARQ feedback
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1074
//   update UL HARQ proc id
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1075
  std::map <uint16_t, uint8_t>::iterator itProcId;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1076
  for (itProcId = m_ulHarqCurrentProcessId.begin (); itProcId != m_ulHarqCurrentProcessId.end (); itProcId++)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1077
    {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1078
      (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1079
    }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1080
  for (uint8_t i = 0; i < params.m_ulInfoList.size (); i++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1081
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1082
      if (params.m_ulInfoList.at (i).m_receptionStatus == UlInfoListElement_s::NotOk)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1083
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1084
          // retx correspondent block: retrieve the UL-DCI
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1085
          uint16_t rnti = params.m_ulInfoList.at (i).m_rnti;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1086
          uint8_t harqId = (uint8_t)((*itProcId).second - HARQ_PERIOD) % HARQ_PROC_NUM;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1087
          NS_LOG_INFO (this << " UL-HARQ retx RNTI " << rnti << " harqId " << (uint16_t)harqId);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1088
          std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itHarq = m_ulHarqProcessesDciBuffer.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1089
          if (itHarq == m_ulHarqProcessesDciBuffer.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1090
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1091
              NS_FATAL_ERROR ("No info find in UL-HARQ buffer for UE " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1092
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1093
          itProcId = m_ulHarqCurrentProcessId.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1094
          if (itProcId == m_ulHarqCurrentProcessId.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1095
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1096
              NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1097
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1098
          UlDciListElement_s dci = (*itHarq).second.at (harqId);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1099
          std::map <uint16_t, UlHarqProcessesStatus_t>::iterator itStat = m_ulHarqProcessesStatus.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1100
          if (itStat == m_ulHarqProcessesStatus.end ())
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1101
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1102
              NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1103
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1104
          if ((*itStat).second.at (harqId) > 3)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1105
            {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1106
              NS_LOG_INFO ("Max number of retransmissions reached (UL)-> drop process");
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1107
              continue;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1108
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1109
          bool free = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1110
          for (int j = dci.m_rbStart; j < dci.m_rbStart + dci.m_rbLen; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1111
            {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1112
              if (rbMap.at (j) == true)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1113
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1114
                  free = false;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1115
                  NS_LOG_INFO (this << " BUSY " << j);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1116
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1117
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1118
          if (free)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1119
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1120
              // retx on the same RBs
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1121
              for (int j = dci.m_rbStart; j < dci.m_rbStart + dci.m_rbLen; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1122
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1123
                  rbMap.at (j) = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1124
                  rbgAllocationMap.at (j) = dci.m_rnti;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1125
                  NS_LOG_INFO ("\t" << j);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1126
                  rbAllocatedNum++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1127
                }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1128
              NS_LOG_INFO (this << " Send retx in the same RBGs " << (uint16_t)dci.m_rbStart << " to " << dci.m_rbStart + dci.m_rbLen);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1129
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1130
          else
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1131
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1132
              NS_FATAL_ERROR ("Cannot allocare retx for UE " << rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1133
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1134
          dci.m_ndi = 0;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1135
          ret.m_dciList.push_back (dci);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1136
          rntiAllocated.insert (dci.m_rnti);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1137
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1138
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1139
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1140
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1141
  std::map <uint16_t,uint32_t>::iterator it;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1142
  int nflows = 0;
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1143
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1144
  for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1145
    {
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1146
      std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).first);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1147
      // select UEs with queues not empty and not yet allocated for HARQ
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1148
      if (((*it).second > 0)&&(itRnti == rntiAllocated.end ()))
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1149
        {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1150
          nflows++;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1151
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1152
    }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1153
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1154
  if (nflows == 0)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1155
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1156
      return;  // no flows to be scheduled
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1157
    }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1158
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1159
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1160
  // Divide the remaining resources equally among the active users starting from the subsequent one served last scheduling trigger
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1161
  uint16_t rbPerFlow = (m_cschedCellConfig.m_ulBandwidth) / (nflows + rntiAllocated.size ());
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1162
  if (rbPerFlow == 0)
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1163
    {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1164
      rbPerFlow = 1;              // at least 1 rbg per flow (till available resource)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1165
    }
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1166
  uint16_t rbAllocated = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1167
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1168
  if (m_nextRntiUl != 0)
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1169
    {
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1170
      for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++)
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1171
        {
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1172
          if ((*it).first == m_nextRntiUl)
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1173
            {
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1174
              break;
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1175
            }
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1176
        }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1177
      if (it == m_ceBsrRxed.end ())
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1178
        {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1179
          NS_LOG_ERROR (this << " no user found");
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1180
        }
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1181
    }
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1182
  else
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1183
    {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1184
      it = m_ceBsrRxed.begin ();
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1185
      m_nextRntiUl = (*it).first;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1186
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1187
  NS_LOG_INFO (this << " RB per Flow " << rbPerFlow);
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1188
  do
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1189
    {
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1190
      std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).first);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1191
      if ((itRnti != rntiAllocated.end ())||((*it).second == 0))
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1192
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1193
          // UE already allocated for UL-HARQ -> skip it
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1194
          it++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1195
          if (it == m_ceBsrRxed.end ())
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1196
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1197
              // restart from the first
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1198
              it = m_ceBsrRxed.begin ();
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1199
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1200
          continue;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1201
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1202
      if (rbAllocated + rbPerFlow > m_cschedCellConfig.m_ulBandwidth)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1203
        {
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1204
          // limit to physical resources last resource assignment
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1205
          rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1206
        }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1207
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1208
      UlDciListElement_s uldci;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1209
      uldci.m_rnti = (*it).first;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1210
      uldci.m_rbLen = rbPerFlow;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1211
      bool allocated = false;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1212
      while ((!allocated)&&(rbAllocated < m_cschedCellConfig.m_ulBandwidth))
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1213
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1214
          // check availability
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1215
          bool free = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1216
          for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1217
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1218
              if (rbMap.at (j) == true)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1219
                {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1220
                  free = false;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1221
                  break;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1222
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1223
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1224
          if (free)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1225
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1226
              uldci.m_rbStart = rbAllocated;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1227
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1228
              for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1229
                {
9367
b4fcfc26791f Add lte-harq test suite and polishing of code
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9365
diff changeset
  1230
                  rbMap.at (j) = true;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1231
                  // store info on allocation for managing ul-cqi interpretation
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1232
                  rbgAllocationMap.at (j) = (*it).first;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1233
                  NS_LOG_DEBUG ("\t " << j);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1234
                }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1235
              rbAllocated += rbPerFlow;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1236
              allocated = true;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1237
              break;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1238
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1239
          rbAllocated++;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1240
        }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1241
      if (!allocated)
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1242
        {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1243
          // unable to allocate new resource: finish scheduling
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1244
          if (ret.m_dciList.size () > 0)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1245
            {
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1246
              m_schedSapUser->SchedUlConfigInd (ret);
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1247
            }
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1248
          m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> > (params.m_sfnSf, rbgAllocationMap));
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1249
          return;
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1250
        }
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1251
      std::map <uint16_t, std::vector <double> >::iterator itCqi = m_ueCqi.find ((*it).first);
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1252
      int cqi = 0;
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1253
      if (itCqi == m_ueCqi.end ())
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1254
        {
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1255
          // no cqi info about this UE
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1256
          uldci.m_mcs = 0; // MCS 0 -> UL-AMC TBD
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1257
          NS_LOG_INFO (this << " UE does not have ULCQI " << (*it).first );
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1258
        }
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1259
      else
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1260
        {
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1261
          // take the lowest CQI value (worst RB)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1262
          double minSinr = (*itCqi).second.at (uldci.m_rbStart);
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1263
          for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_rbLen; i++)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1264
            {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1265
              if ((*itCqi).second.at (i) < minSinr)
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1266
                {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1267
                  minSinr = (*itCqi).second.at (i);
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1268
                }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1269
            }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1270
          // translate SINR -> cqi: WILD ACK: same as DL
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1271
          double s = log2 ( 1 + (
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1272
                              pow (10, minSinr / 10 )  /
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1273
                              ( (-log (5.0 * 0.00005 )) / 1.5) ));
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1274
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1275
8516
db748e56aea2 Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8513
diff changeset
  1276
          cqi = m_amc->GetCqiFromSpectralEfficiency (s);
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
  1277
          if (cqi == 0)
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
  1278
            {
8080
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1279
              it++;
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1280
              if (it == m_ceBsrRxed.end ())
8080
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1281
                {
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1282
                  // restart from the first
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1283
                  it = m_ceBsrRxed.begin ();
62d2fccef672 Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8077
diff changeset
  1284
                }
7966
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
  1285
              continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 36.213)
c2cfb1a64d66 LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents: 7953
diff changeset
  1286
            }
8516
db748e56aea2 Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8513
diff changeset
  1287
          uldci.m_mcs = m_amc->GetMcsFromCqi (cqi);
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1288
        }
8516
db748e56aea2 Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8513
diff changeset
  1289
      uldci.m_tbSize = (m_amc->GetTbSizeFromMcs (uldci.m_mcs, rbPerFlow) / 8); // MCS 0 -> UL-AMC TBD
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1290
8675
e65859f03e99 Bug-fix: update m_ceBsrRxed each UL scheduling trigger event
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1291
      UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize);
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1292
      uldci.m_ndi = 1;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1293
      uldci.m_cceIndex = 0;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1294
      uldci.m_aggrLevel = 1;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1295
      uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1296
      uldci.m_hopping = false;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1297
      uldci.m_n2Dmrs = 0;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1298
      uldci.m_tpc = 0; // no power control
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1299
      uldci.m_cqiRequest = false; // only period CQI at this stage
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1300
      uldci.m_ulIndex = 0; // TDD parameter
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1301
      uldci.m_dai = 1; // TDD parameter
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1302
      uldci.m_freqHopping = 0;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1303
      uldci.m_pdcchPowerOffset = 0; // not used
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1304
      ret.m_dciList.push_back (uldci);
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1305
      // store DCI for HARQ_PERIOD
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1306
      uint8_t harqId = 0;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1307
      if (m_harqOn == true)
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1308
        {
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1309
          itProcId = m_ulHarqCurrentProcessId.find (uldci.m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1310
          if (itProcId == m_ulHarqCurrentProcessId.end ())
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1311
            {
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1312
              NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_rnti);
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1313
            }
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1314
          harqId = (*itProcId).second;
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1315
          std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ulHarqProcessesDciBuffer.find (uldci.m_rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1316
          if (itDci == m_ulHarqProcessesDciBuffer.end ())
9352
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1317
            {
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1318
              NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer for RNTI " << uldci.m_rnti);
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1319
            }
0b43d0a862dc HARQ included in PF Scheduler
mmiozzo
parents: 9351
diff changeset
  1320
          (*itDci).second.at (harqId) = uldci;
9351
6e074e67a1ad HARQ first draft version: RR works, PF todo, LteMiErrorModel on-going
mmiozzo
parents: 9350
diff changeset
  1321
        }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1322
      NS_LOG_INFO (this << " UL Allocation - UE " << (*it).first << " startPRB " << (uint32_t)uldci.m_rbStart << " nPRB " << (uint32_t)uldci.m_rbLen << " CQI " << cqi << " MCS " << (uint32_t)uldci.m_mcs << " TBsize " << uldci.m_tbSize << " harqId " << (uint16_t)harqId);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1323
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1324
      it++;
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1325
      if (it == m_ceBsrRxed.end ())
8077
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1326
        {
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1327
          // restart from the first
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1328
          it = m_ceBsrRxed.begin ();
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1329
        }
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1330
      if (rbAllocated == m_cschedCellConfig.m_ulBandwidth)
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1331
        {
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1332
          // Stop allocation: no more PRBs
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1333
          m_nextRntiUl = (*it).first;
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1334
          break;
6416d09febbf RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8067
diff changeset
  1335
        }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1336
    }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1337
  while ((*it).first != m_nextRntiUl);
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1338
  m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> > (params.m_sfnSf, rbgAllocationMap));
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1339
  m_schedSapUser->SchedUlConfigInd (ret);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1340
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1341
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1342
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1343
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1344
RrFfMacScheduler::DoSchedUlNoiseInterferenceReq (const struct FfMacSchedSapProvider::SchedUlNoiseInterferenceReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1345
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1346
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1347
  // TODO: Implementation of the API
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1348
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1349
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1350
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1351
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1352
RrFfMacScheduler::DoSchedUlSrInfoReq (const struct FfMacSchedSapProvider::SchedUlSrInfoReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1353
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1354
  NS_LOG_FUNCTION (this);
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1355
  // TODO: Implementation of the API
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1356
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1357
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1358
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1359
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1360
RrFfMacScheduler::DoSchedUlMacCtrlInfoReq (const struct FfMacSchedSapProvider::SchedUlMacCtrlInfoReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1361
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1362
  NS_LOG_FUNCTION (this);
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1363
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1364
  std::map <uint16_t,uint32_t>::iterator it;
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1365
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1366
  for (unsigned int i = 0; i < params.m_macCeList.size (); i++)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1367
    {
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1368
      if ( params.m_macCeList.at (i).m_macCeType == MacCeListElement_s::BSR )
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1369
        {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1370
          // buffer status report
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1371
          // note that this scheduler does not differentiate the
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1372
          // allocation according to which LCGs have more/less bytes
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1373
          // to send.
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1374
          // Hence the BSR of different LCGs are just summed up to get
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1375
          // a total queue size that is used for allocation purposes.
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1376
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1377
          uint32_t buffer = 0;
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1378
          for (uint8_t lcg = 0; lcg < 4; ++lcg)
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1379
            {
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1380
              uint8_t bsrId = params.m_macCeList.at (i).m_macCeValue.m_bufferStatus.at (lcg);
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1381
              buffer += BufferSizeLevelBsr::BsrId2BufferSize (bsrId);
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1382
            }
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1383
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1384
          uint16_t rnti = params.m_macCeList.at (i).m_rnti;
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1385
          it = m_ceBsrRxed.find (rnti);
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1386
          if (it == m_ceBsrRxed.end ())
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1387
            {
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1388
              // create the new entry
8887
90cbd09c8ff6 fixed bug with multiple LCs in UL BSR
Nicola Baldo <nbaldo@cttc.es>
parents: 8859
diff changeset
  1389
              m_ceBsrRxed.insert ( std::pair<uint16_t, uint32_t > (rnti, buffer));
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1390
            }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1391
          else
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1392
            {
8887
90cbd09c8ff6 fixed bug with multiple LCs in UL BSR
Nicola Baldo <nbaldo@cttc.es>
parents: 8859
diff changeset
  1393
              // update the buffer size value
9369
eac9f11f4ced Updates on LCs and BSRs management on RR and PF schedulers
mmiozzo
parents: 9368
diff changeset
  1394
              (*it).second = buffer;
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1395
            }
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1396
        }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1397
    }
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1398
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1399
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1400
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1401
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1402
void
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1403
RrFfMacScheduler::DoSchedUlCqiInfoReq (const struct FfMacSchedSapProvider::SchedUlCqiInfoReqParameters& params)
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1404
{
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1405
  NS_LOG_FUNCTION (this);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1406
9039
5bdf0c1be85f Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8729
diff changeset
  1407
  switch (m_ulCqiFilter)
5bdf0c1be85f Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8729
diff changeset
  1408
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1409
    case FfMacScheduler::SRS_UL_CQI:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1410
      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1411
        // filter all the CQIs that are not SRS based
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1412
        if (params.m_ulCqi.m_type != UlCqi_s::SRS)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1413
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1414
            return;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1415
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1416
      }
9039
5bdf0c1be85f Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8729
diff changeset
  1417
      break;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1418
    case FfMacScheduler::PUSCH_UL_CQI:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1419
      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1420
        // filter all the CQIs that are not SRS based
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1421
        if (params.m_ulCqi.m_type != UlCqi_s::PUSCH)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1422
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1423
            return;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1424
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1425
      }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1426
    case FfMacScheduler::ALL_UL_CQI:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1427
      break;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1428
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1429
    default:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1430
      NS_FATAL_ERROR ("Unknown UL CQI type");
9039
5bdf0c1be85f Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8729
diff changeset
  1431
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1432
  switch (params.m_ulCqi.m_type)
7948
7a7b4ad007b0 UL-CQI and AMC in RrFfMacScheduler
mmiozzo
parents: 7906
diff changeset
  1433
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1434
    case UlCqi_s::PUSCH:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1435
      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1436
        std::map <uint16_t, std::vector <uint16_t> >::iterator itMap;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1437
        std::map <uint16_t, std::vector <double> >::iterator itCqi;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1438
        itMap = m_allocationMaps.find (params.m_sfnSf);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1439
        if (itMap == m_allocationMaps.end ())
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1440
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1441
            NS_LOG_INFO (this << " Does not find info on allocation, size : " << m_allocationMaps.size ());
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1442
            return;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1443
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1444
        for (uint32_t i = 0; i < (*itMap).second.size (); i++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1445
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1446
            // convert from fixed point notation Sxxxxxxxxxxx.xxx to double
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1447
            double sinr = LteFfConverter::fpS11dot3toDouble (params.m_ulCqi.m_sinr.at (i));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1448
            itCqi = m_ueCqi.find ((*itMap).second.at (i));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1449
            if (itCqi == m_ueCqi.end ())
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1450
              {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1451
                // create a new entry
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1452
                std::vector <double> newCqi;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1453
                for (uint32_t j = 0; j < m_cschedCellConfig.m_ulBandwidth; j++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1454
                  {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1455
                    if (i == j)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1456
                      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1457
                        newCqi.push_back (sinr);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1458
                      }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1459
                    else
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1460
                      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1461
                        // initialize with NO_SINR value.
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1462
                        newCqi.push_back (30.0);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1463
                      }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1464
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1465
                  }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1466
                m_ueCqi.insert (std::pair <uint16_t, std::vector <double> > ((*itMap).second.at (i), newCqi));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1467
                // generate correspondent timer
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1468
                m_ueCqiTimers.insert (std::pair <uint16_t, uint32_t > ((*itMap).second.at (i), m_cqiTimersThreshold));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1469
              }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1470
            else
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1471
              {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1472
                // update the value
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1473
                (*itCqi).second.at (i) = sinr;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1474
                // update correspondent timer
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1475
                std::map <uint16_t, uint32_t>::iterator itTimers;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1476
                itTimers = m_ueCqiTimers.find ((*itMap).second.at (i));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1477
                (*itTimers).second = m_cqiTimersThreshold;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1478
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1479
              }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1480
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1481
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1482
        // remove obsolete info on allocation
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1483
        m_allocationMaps.erase (itMap);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1484
      }
9042
ae924de31cbd Update SRS-CQI management in RR and PF Schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9039
diff changeset
  1485
      break;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1486
    case UlCqi_s::SRS:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1487
      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1488
        // get the RNTI from vendor specific parameters
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1489
        uint16_t rnti = 0;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1490
        NS_ASSERT (params.m_vendorSpecificList.size () > 0);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1491
        for (uint16_t i = 0; i < params.m_vendorSpecificList.size (); i++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1492
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1493
            if (params.m_vendorSpecificList.at (i).m_type == SRS_CQI_RNTI_VSP)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1494
              {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1495
                Ptr<SrsCqiRntiVsp> vsp = DynamicCast<SrsCqiRntiVsp> (params.m_vendorSpecificList.at (i).m_value);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1496
                rnti = vsp->GetRnti ();
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1497
              }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1498
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1499
        std::map <uint16_t, std::vector <double> >::iterator itCqi;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1500
        itCqi = m_ueCqi.find (rnti);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1501
        if (itCqi == m_ueCqi.end ())
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1502
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1503
            // create a new entry
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1504
            std::vector <double> newCqi;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1505
            for (uint32_t j = 0; j < m_cschedCellConfig.m_ulBandwidth; j++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1506
              {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1507
                double sinr = LteFfConverter::fpS11dot3toDouble (params.m_ulCqi.m_sinr.at (j));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1508
                newCqi.push_back (sinr);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1509
                NS_LOG_INFO (this << " RNTI " << rnti << " new SRS-CQI for RB  " << j << " value " << sinr);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1510
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1511
              }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1512
            m_ueCqi.insert (std::pair <uint16_t, std::vector <double> > (rnti, newCqi));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1513
            // generate correspondent timer
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1514
            m_ueCqiTimers.insert (std::pair <uint16_t, uint32_t > (rnti, m_cqiTimersThreshold));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1515
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1516
        else
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1517
          {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1518
            // update the values
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1519
            for (uint32_t j = 0; j < m_cschedCellConfig.m_ulBandwidth; j++)
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1520
              {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1521
                double sinr = LteFfConverter::fpS11dot3toDouble (params.m_ulCqi.m_sinr.at (j));
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1522
                (*itCqi).second.at (j) = sinr;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1523
                NS_LOG_INFO (this << " RNTI " << rnti << " update SRS-CQI for RB  " << j << " value " << sinr);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1524
              }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1525
            // update correspondent timer
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1526
            std::map <uint16_t, uint32_t>::iterator itTimers;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1527
            itTimers = m_ueCqiTimers.find (rnti);
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1528
            (*itTimers).second = m_cqiTimersThreshold;
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1529
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1530
          }
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1531
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1532
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1533
      }
9042
ae924de31cbd Update SRS-CQI management in RR and PF Schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9039
diff changeset
  1534
      break;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1535
    case UlCqi_s::PUCCH_1:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1536
    case UlCqi_s::PUCCH_2:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1537
    case UlCqi_s::PRACH:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1538
      {
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1539
        NS_FATAL_ERROR ("PfFfMacScheduler supports only PUSCH and SRS UL-CQIs");
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1540
      }
9042
ae924de31cbd Update SRS-CQI management in RR and PF Schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9039
diff changeset
  1541
      break;
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1542
    default:
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1543
      NS_FATAL_ERROR ("Unknown type of UL-CQI");
8148
09e2d03022a2 run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents: 8086
diff changeset
  1544
    }
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1545
  return;
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1546
}
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1547
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1548
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1549
void
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1550
RrFfMacScheduler::RefreshDlCqiMaps (void)
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1551
{
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1552
  NS_LOG_FUNCTION (this << m_p10CqiTimers.size ());
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1553
  // refresh DL CQI P01 Map
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1554
  std::map <uint16_t,uint32_t>::iterator itP10 = m_p10CqiTimers.begin ();
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1555
  while (itP10 != m_p10CqiTimers.end ())
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1556
    {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1557
      NS_LOG_INFO (this << " P10-CQI for user " << (*itP10).first << " is " << (uint32_t)(*itP10).second << " thr " << (uint32_t)m_cqiTimersThreshold);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1558
      if ((*itP10).second == 0)
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1559
        {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1560
          // delete correspondent entries
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1561
          std::map <uint16_t,uint8_t>::iterator itMap = m_p10CqiRxed.find ((*itP10).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1562
          NS_ASSERT_MSG (itMap != m_p10CqiRxed.end (), " Does not find CQI report for user " << (*itP10).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1563
          NS_LOG_INFO (this << " P10-CQI exired for user " << (*itP10).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1564
          m_p10CqiRxed.erase (itMap);
8584
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1565
          std::map <uint16_t,uint32_t>::iterator temp = itP10;
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1566
          itP10++;
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1567
          m_p10CqiTimers.erase (temp);
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1568
        }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1569
      else
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1570
        {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1571
          (*itP10).second--;
8584
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1572
          itP10++;
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1573
        }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1574
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1575
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1576
  return;
7886
b65c16d4da83 LENA project first public release
CTTC
parents:
diff changeset
  1577
}
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1578
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1579
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1580
void
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1581
RrFfMacScheduler::RefreshUlCqiMaps (void)
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1582
{
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1583
  // refresh UL CQI  Map
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1584
  std::map <uint16_t,uint32_t>::iterator itUl = m_ueCqiTimers.begin ();
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1585
  while (itUl != m_ueCqiTimers.end ())
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1586
    {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1587
      NS_LOG_INFO (this << " UL-CQI for user " << (*itUl).first << " is " << (uint32_t)(*itUl).second << " thr " << (uint32_t)m_cqiTimersThreshold);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1588
      if ((*itUl).second == 0)
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1589
        {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1590
          // delete correspondent entries
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1591
          std::map <uint16_t, std::vector <double> >::iterator itMap = m_ueCqi.find ((*itUl).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1592
          NS_ASSERT_MSG (itMap != m_ueCqi.end (), " Does not find CQI report for user " << (*itUl).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1593
          NS_LOG_INFO (this << " UL-CQI exired for user " << (*itUl).first);
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1594
          (*itMap).second.clear ();
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1595
          m_ueCqi.erase (itMap);
8584
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1596
          std::map <uint16_t,uint32_t>::iterator temp = itUl;
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1597
          itUl++;
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1598
          m_ueCqiTimers.erase (temp);
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1599
        }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1600
      else
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1601
        {
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1602
          (*itUl).second--;
8584
188a9d439fd8 Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8538
diff changeset
  1603
          itUl++;
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1604
        }
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1605
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1606
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1607
  return;
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1608
}
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1609
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1610
void
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1611
RrFfMacScheduler::UpdateDlRlcBufferInfo (uint16_t rnti, uint8_t lcid, uint16_t size)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1612
{
8858
6336a6eabf99 Update Ul and Dl RlcBufferInfo methods of RR and PF scheduler for considering the minimum RLC overhead when decrementing queues
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1613
  size = size - 2; // remove the minimum RLC overhead
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1614
  std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1615
  for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1616
    {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1617
      if (((*it).m_rnti == rnti) && ((*it).m_logicalChannelIdentity))
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1618
        {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1619
          NS_LOG_INFO (this << " UE " << rnti << " LC " << (uint16_t)lcid << " txqueue " << (*it).m_rlcTransmissionQueueSize << " retxqueue " << (*it).m_rlcRetransmissionQueueSize << " status " << (*it).m_rlcStatusPduSize << " decrease " << size);
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1620
          // Update queues: RLC tx order Status, ReTx, Tx
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1621
          // Update status queue
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1622
          if ((*it).m_rlcStatusPduSize <= size)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1623
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1624
              size -= (*it).m_rlcStatusPduSize;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1625
              (*it).m_rlcStatusPduSize = 0;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1626
            }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1627
          else
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1628
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1629
              (*it).m_rlcStatusPduSize -= size;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1630
              return;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1631
            }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1632
          // update retransmission queue
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1633
          if ((*it).m_rlcRetransmissionQueueSize <= size)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1634
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1635
              size -= (*it).m_rlcRetransmissionQueueSize;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1636
              (*it).m_rlcRetransmissionQueueSize = 0;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1637
            }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1638
          else
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1639
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1640
              (*it).m_rlcRetransmissionQueueSize -= size;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1641
              return;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1642
            }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1643
          // update transmission queue
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1644
          if ((*it).m_rlcTransmissionQueueSize <= size)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1645
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1646
              size -= (*it).m_rlcTransmissionQueueSize;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1647
              (*it).m_rlcTransmissionQueueSize = 0;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1648
            }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1649
          else
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1650
            {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1651
              (*it).m_rlcTransmissionQueueSize -= size;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1652
              return;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1653
            }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1654
          return;
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1655
        }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1656
    }
8311
ec257b681d85 Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8264
diff changeset
  1657
}
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1658
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1659
void
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1660
RrFfMacScheduler::UpdateUlRlcBufferInfo (uint16_t rnti, uint16_t size)
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1661
{
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1662
8858
6336a6eabf99 Update Ul and Dl RlcBufferInfo methods of RR and PF scheduler for considering the minimum RLC overhead when decrementing queues
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1663
  size = size - 2; // remove the minimum RLC overhead
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1664
  std::map <uint16_t,uint32_t>::iterator it = m_ceBsrRxed.find (rnti);
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1665
  if (it != m_ceBsrRxed.end ())
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1666
    {
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1667
      NS_LOG_INFO (this << " Update RLC BSR UE " << rnti << " size " << size << " BSR " << (*it).second);
8497
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1668
      if ((*it).second >= size)
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1669
        {
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1670
          (*it).second -= size;
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1671
        }
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1672
      else
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1673
        {
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1674
          (*it).second = 0;
b06cd67bc6ba Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8435
diff changeset
  1675
        }
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1676
    }
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1677
  else
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1678
    {
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1679
      NS_LOG_ERROR (this << " Does not find BSR report info of UE " << rnti);
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1680
    }
9374
77f6eab81eac Run check-style and polish logs on RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents: 9372
diff changeset
  1681
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1682
}
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1683
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1684
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1685
void
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1686
RrFfMacScheduler::TransmissionModeConfigurationUpdate (uint16_t rnti, uint8_t txMode)
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1687
{
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1688
  NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode);
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1689
  FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params;
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1690
  params.m_rnti = rnti;
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1691
  params.m_transmissionMode = txMode;
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1692
  m_cschedSapUser->CschedUeConfigUpdateInd (params);
8435
6b0542a91970 Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents: 8413
diff changeset
  1693
}
8714
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1694
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1695
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1696
398bbcbb3f42 Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents: 8584
diff changeset
  1697
}