author | Marco Miozzo <marco.miozzo@cttc.es> |
Thu, 28 Jun 2012 17:30:43 +0200 | |
changeset 9039 | 5bdf0c1be85f |
parent 8729 | 74de12409ee5 |
child 9042 | ae924de31cbd |
permissions | -rw-r--r-- |
7886 | 1 |
/* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ |
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/* |
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* Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation; |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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* |
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* Author: Marco Miozzo <marco.miozzo@cttc.es> |
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*/ |
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#include <ns3/log.h> |
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#include <ns3/pointer.h> |
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#include <ns3/lte-amc.h> |
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#include <ns3/rr-ff-mac-scheduler.h> |
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#include <ns3/simulator.h> |
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#include <ns3/lte-common.h> |
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NS_LOG_COMPONENT_DEFINE ("RrFfMacScheduler"); |
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namespace ns3 { |
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int Type0AllocationRbg[4] = { |
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10, // RGB size 1 |
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26, // RGB size 2 |
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63, // RGB size 3 |
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110 // RGB size 4 |
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}; // see table 7.1.6.1-1 of 36.213 |
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NS_OBJECT_ENSURE_REGISTERED (RrFfMacScheduler); |
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class RrSchedulerMemberCschedSapProvider : public FfMacCschedSapProvider |
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{ |
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public: |
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RrSchedulerMemberCschedSapProvider (RrFfMacScheduler* scheduler); |
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// inherited from FfMacCschedSapProvider |
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virtual void CschedCellConfigReq (const struct CschedCellConfigReqParameters& params); |
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virtual void CschedUeConfigReq (const struct CschedUeConfigReqParameters& params); |
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virtual void CschedLcConfigReq (const struct CschedLcConfigReqParameters& params); |
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virtual void CschedLcReleaseReq (const struct CschedLcReleaseReqParameters& params); |
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virtual void CschedUeReleaseReq (const struct CschedUeReleaseReqParameters& params); |
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private: |
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RrSchedulerMemberCschedSapProvider (); |
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RrFfMacScheduler* m_scheduler; |
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}; |
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RrSchedulerMemberCschedSapProvider::RrSchedulerMemberCschedSapProvider () |
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{ |
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} |
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RrSchedulerMemberCschedSapProvider::RrSchedulerMemberCschedSapProvider (RrFfMacScheduler* scheduler) : m_scheduler (scheduler) |
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{ |
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} |
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void |
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RrSchedulerMemberCschedSapProvider::CschedCellConfigReq (const struct CschedCellConfigReqParameters& params) |
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{ |
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m_scheduler->DoCschedCellConfigReq (params); |
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} |
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void |
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RrSchedulerMemberCschedSapProvider::CschedUeConfigReq (const struct CschedUeConfigReqParameters& params) |
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{ |
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m_scheduler->DoCschedUeConfigReq (params); |
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} |
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void |
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RrSchedulerMemberCschedSapProvider::CschedLcConfigReq (const struct CschedLcConfigReqParameters& params) |
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{ |
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m_scheduler->DoCschedLcConfigReq (params); |
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} |
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void |
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RrSchedulerMemberCschedSapProvider::CschedLcReleaseReq (const struct CschedLcReleaseReqParameters& params) |
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{ |
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m_scheduler->DoCschedLcReleaseReq (params); |
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} |
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void |
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RrSchedulerMemberCschedSapProvider::CschedUeReleaseReq (const struct CschedUeReleaseReqParameters& params) |
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{ |
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m_scheduler->DoCschedUeReleaseReq (params); |
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} |
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class RrSchedulerMemberSchedSapProvider : public FfMacSchedSapProvider |
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{ |
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public: |
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RrSchedulerMemberSchedSapProvider (RrFfMacScheduler* scheduler); |
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// inherited from FfMacSchedSapProvider |
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virtual void SchedDlRlcBufferReq (const struct SchedDlRlcBufferReqParameters& params); |
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virtual void SchedDlPagingBufferReq (const struct SchedDlPagingBufferReqParameters& params); |
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virtual void SchedDlMacBufferReq (const struct SchedDlMacBufferReqParameters& params); |
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virtual void SchedDlTriggerReq (const struct SchedDlTriggerReqParameters& params); |
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virtual void SchedDlRachInfoReq (const struct SchedDlRachInfoReqParameters& params); |
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virtual void SchedDlCqiInfoReq (const struct SchedDlCqiInfoReqParameters& params); |
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virtual void SchedUlTriggerReq (const struct SchedUlTriggerReqParameters& params); |
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virtual void SchedUlNoiseInterferenceReq (const struct SchedUlNoiseInterferenceReqParameters& params); |
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virtual void SchedUlSrInfoReq (const struct SchedUlSrInfoReqParameters& params); |
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virtual void SchedUlMacCtrlInfoReq (const struct SchedUlMacCtrlInfoReqParameters& params); |
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virtual void SchedUlCqiInfoReq (const struct SchedUlCqiInfoReqParameters& params); |
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private: |
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RrSchedulerMemberSchedSapProvider (); |
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RrFfMacScheduler* m_scheduler; |
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}; |
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RrSchedulerMemberSchedSapProvider::RrSchedulerMemberSchedSapProvider () |
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{ |
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} |
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RrSchedulerMemberSchedSapProvider::RrSchedulerMemberSchedSapProvider (RrFfMacScheduler* scheduler) |
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: m_scheduler (scheduler) |
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{ |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlRlcBufferReq (const struct SchedDlRlcBufferReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlRlcBufferReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlPagingBufferReq (const struct SchedDlPagingBufferReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlPagingBufferReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlMacBufferReq (const struct SchedDlMacBufferReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlMacBufferReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlTriggerReq (const struct SchedDlTriggerReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlTriggerReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlRachInfoReq (const struct SchedDlRachInfoReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlRachInfoReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedDlCqiInfoReq (const struct SchedDlCqiInfoReqParameters& params) |
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{ |
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m_scheduler->DoSchedDlCqiInfoReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedUlTriggerReq (const struct SchedUlTriggerReqParameters& params) |
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{ |
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m_scheduler->DoSchedUlTriggerReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedUlNoiseInterferenceReq (const struct SchedUlNoiseInterferenceReqParameters& params) |
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{ |
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m_scheduler->DoSchedUlNoiseInterferenceReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedUlSrInfoReq (const struct SchedUlSrInfoReqParameters& params) |
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{ |
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m_scheduler->DoSchedUlSrInfoReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedUlMacCtrlInfoReq (const struct SchedUlMacCtrlInfoReqParameters& params) |
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{ |
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m_scheduler->DoSchedUlMacCtrlInfoReq (params); |
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} |
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void |
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RrSchedulerMemberSchedSapProvider::SchedUlCqiInfoReq (const struct SchedUlCqiInfoReqParameters& params) |
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{ |
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m_scheduler->DoSchedUlCqiInfoReq (params); |
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} |
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RrFfMacScheduler::RrFfMacScheduler () |
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: m_cschedSapUser (0), |
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m_schedSapUser (0), |
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m_nextRntiDl (0), |
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m_nextRntiUl (0) |
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{ |
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m_amc = CreateObject <LteAmc> (); |
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m_cschedSapProvider = new RrSchedulerMemberCschedSapProvider (this); |
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m_schedSapProvider = new RrSchedulerMemberSchedSapProvider (this); |
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} |
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RrFfMacScheduler::~RrFfMacScheduler () |
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{ |
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NS_LOG_FUNCTION (this); |
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} |
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void |
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RrFfMacScheduler::DoDispose () |
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{ |
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NS_LOG_FUNCTION (this); |
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delete m_cschedSapProvider; |
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delete m_schedSapProvider; |
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} |
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TypeId |
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RrFfMacScheduler::GetTypeId (void) |
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{ |
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static TypeId tid = TypeId ("ns3::RrFfMacScheduler") |
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.SetParent<FfMacScheduler> () |
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.AddConstructor<RrFfMacScheduler> () |
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.AddAttribute ("CqiTimerThreshold", |
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"The number of TTIs a CQI is valid (default 1000 - 1 sec.)", |
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UintegerValue (1000), |
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MakeUintegerAccessor (&RrFfMacScheduler::m_cqiTimersThreshold), |
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MakeUintegerChecker<uint32_t> ()) |
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; |
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return tid; |
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} |
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void |
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RrFfMacScheduler::SetFfMacCschedSapUser (FfMacCschedSapUser* s) |
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{ |
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m_cschedSapUser = s; |
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} |
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void |
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RrFfMacScheduler::SetFfMacSchedSapUser (FfMacSchedSapUser* s) |
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{ |
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m_schedSapUser = s; |
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} |
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FfMacCschedSapProvider* |
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RrFfMacScheduler::GetFfMacCschedSapProvider () |
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{ |
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return m_cschedSapProvider; |
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} |
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FfMacSchedSapProvider* |
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RrFfMacScheduler::GetFfMacSchedSapProvider () |
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{ |
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return m_schedSapProvider; |
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} |
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void |
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RrFfMacScheduler::DoCschedCellConfigReq (const struct FfMacCschedSapProvider::CschedCellConfigReqParameters& params) |
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{ |
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NS_LOG_FUNCTION (this); |
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// Read the subset of parameters used |
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m_cschedCellConfig = params; |
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FfMacCschedSapUser::CschedUeConfigCnfParameters cnf; |
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cnf.m_result = SUCCESS; |
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m_cschedSapUser->CschedUeConfigCnf (cnf); |
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return; |
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} |
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288 |
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void |
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290 |
RrFfMacScheduler::DoCschedUeConfigReq (const struct FfMacCschedSapProvider::CschedUeConfigReqParameters& params) |
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{ |
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NS_LOG_FUNCTION (this << " RNTI " << params.m_rnti << " txMode " << (uint16_t)params.m_transmissionMode); |
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std::map <uint16_t,uint8_t>::iterator it = m_uesTxMode.find (params.m_rnti); |
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if (it==m_uesTxMode.end ()) |
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{ |
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m_uesTxMode.insert (std::pair <uint16_t, double> (params.m_rnti, params.m_transmissionMode)); |
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} |
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else |
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{ |
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(*it).second = params.m_transmissionMode; |
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} |
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return; |
303 |
} |
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304 |
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305 |
void |
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306 |
RrFfMacScheduler::DoCschedLcConfigReq (const struct FfMacCschedSapProvider::CschedLcConfigReqParameters& params) |
|
307 |
{ |
|
308 |
NS_LOG_FUNCTION (this); |
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309 |
// Not used at this stage |
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310 |
return; |
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311 |
} |
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312 |
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313 |
void |
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314 |
RrFfMacScheduler::DoCschedLcReleaseReq (const struct FfMacCschedSapProvider::CschedLcReleaseReqParameters& params) |
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315 |
{ |
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316 |
NS_LOG_FUNCTION (this); |
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317 |
// TODO: Implementation of the API |
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318 |
return; |
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319 |
} |
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320 |
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321 |
void |
|
322 |
RrFfMacScheduler::DoCschedUeReleaseReq (const struct FfMacCschedSapProvider::CschedUeReleaseReqParameters& params) |
|
323 |
{ |
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324 |
NS_LOG_FUNCTION (this); |
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325 |
// TODO: Implementation of the API |
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326 |
return; |
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327 |
} |
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328 |
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329 |
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330 |
void |
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331 |
RrFfMacScheduler::DoSchedDlRlcBufferReq (const struct FfMacSchedSapProvider::SchedDlRlcBufferReqParameters& params) |
|
332 |
{ |
|
333 |
NS_LOG_FUNCTION (this << params.m_rnti << (uint32_t) params.m_logicalChannelIdentity); |
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334 |
// API generated by RLC for updating RLC parameters on a LC (tx and retx queues) |
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335 |
std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it = m_rlcBufferReq.begin (); |
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bool newLc = true; |
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337 |
while (it != m_rlcBufferReq.end ()) |
7886 | 338 |
{ |
339 |
// remove old entries of this UE-LC |
|
340 |
if (((*it).m_rnti == params.m_rnti)&&((*it).m_logicalChannelIdentity == params.m_logicalChannelIdentity)) |
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341 |
{ |
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|
342 |
it = m_rlcBufferReq.erase (it); |
7972
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
343 |
newLc = false; |
7886 | 344 |
} |
8413
3387abb7a77c
better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents:
8412
diff
changeset
|
345 |
else |
3387abb7a77c
better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents:
8412
diff
changeset
|
346 |
{ |
3387abb7a77c
better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents:
8412
diff
changeset
|
347 |
++it; |
3387abb7a77c
better fix for RR scheduler buffer status report bug
Nicola Baldo <nbaldo@cttc.es>
parents:
8412
diff
changeset
|
348 |
} |
7886 | 349 |
} |
7972
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
350 |
// add the new parameters |
7886 | 351 |
m_rlcBufferReq.insert (it, params); |
7972
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
352 |
// initialize statistics of the flow in case of new flows |
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
353 |
if (newLc == true) |
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
354 |
{ |
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
355 |
m_p10CqiRxed.insert ( std::pair<uint16_t, uint8_t > (params.m_rnti, 1)); // only codeword 0 at this stage (SISO) |
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
356 |
// initialized to 1 (i.e., the lowest value for transmitting a signal) |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
357 |
m_p10CqiTimers.insert ( std::pair<uint16_t, uint32_t > (params.m_rnti, m_cqiTimersThreshold)); |
7972
6d24eb482e41
LENA-80 RrFfMacScheduler::DoSchedDlTriggerReq solved issue on nFlows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7966
diff
changeset
|
358 |
} |
7886 | 359 |
|
360 |
return; |
|
361 |
} |
|
362 |
||
363 |
void |
|
364 |
RrFfMacScheduler::DoSchedDlPagingBufferReq (const struct FfMacSchedSapProvider::SchedDlPagingBufferReqParameters& params) |
|
365 |
{ |
|
366 |
NS_LOG_FUNCTION (this); |
|
367 |
// TODO: Implementation of the API |
|
368 |
return; |
|
369 |
} |
|
370 |
||
371 |
void |
|
372 |
RrFfMacScheduler::DoSchedDlMacBufferReq (const struct FfMacSchedSapProvider::SchedDlMacBufferReqParameters& params) |
|
373 |
{ |
|
374 |
NS_LOG_FUNCTION (this); |
|
375 |
// TODO: Implementation of the API |
|
376 |
return; |
|
377 |
} |
|
378 |
||
379 |
int |
|
380 |
RrFfMacScheduler::GetRbgSize (int dlbandwidth) |
|
381 |
{ |
|
382 |
for (int i = 0; i < 4; i++) |
|
383 |
{ |
|
384 |
if (dlbandwidth < Type0AllocationRbg[i]) |
|
385 |
{ |
|
386 |
return (i + 1); |
|
387 |
} |
|
388 |
} |
|
389 |
||
390 |
return (-1); |
|
391 |
} |
|
392 |
||
8320
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
393 |
bool |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
394 |
RrFfMacScheduler::SortRlcBufferReq (FfMacSchedSapProvider::SchedDlRlcBufferReqParameters i,FfMacSchedSapProvider::SchedDlRlcBufferReqParameters j) |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
395 |
{ |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
396 |
return (i.m_rnti<j.m_rnti); |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
397 |
} |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
398 |
|
7886 | 399 |
|
400 |
void |
|
401 |
RrFfMacScheduler::DoSchedDlTriggerReq (const struct FfMacSchedSapProvider::SchedDlTriggerReqParameters& params) |
|
402 |
{ |
|
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
403 |
NS_LOG_FUNCTION (this << " DL Frame no. " << (params.m_sfnSf >> 4) << " subframe no. " << (0xF & params.m_sfnSf)); |
7886 | 404 |
// API generated by RLC for triggering the scheduling of a DL subframe |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
405 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
406 |
RefreshDlCqiMaps (); |
7886 | 407 |
|
408 |
// Get the actual active flows (queue!=0) |
|
8320
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
409 |
std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it; |
756e0218720d
Bug-fix in RrFfMacScheduler::DoSchedDlTriggerReq when scheduling multiple LCs per UE
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8319
diff
changeset
|
410 |
m_rlcBufferReq.sort (SortRlcBufferReq); |
7886 | 411 |
int nflows = 0; |
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
412 |
int nTbs = 0; |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
413 |
std::map <uint16_t,uint8_t> lcActivesPerRnti; |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
414 |
std::map <uint16_t,uint8_t>::iterator itLcRnti; |
7886 | 415 |
for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++) |
416 |
{ |
|
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
417 |
// NS_LOG_INFO (this << " User " << (*it).m_rnti << " LC " << (uint16_t)(*it).m_logicalChannelIdentity); |
7886 | 418 |
// remove old entries of this UE-LC |
419 |
if ( ((*it).m_rlcTransmissionQueueSize > 0) |
|
420 |
|| ((*it).m_rlcRetransmissionQueueSize > 0) |
|
421 |
|| ((*it).m_rlcStatusPduSize > 0) ) |
|
422 |
{ |
|
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
423 |
std::map <uint16_t,uint8_t>::iterator itCqi = m_p10CqiRxed.find ((*it).m_rnti); |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
424 |
uint8_t cqi = 0; |
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
425 |
if (itCqi != m_p10CqiRxed.end ()) |
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
426 |
{ |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
427 |
cqi = (*itCqi).second; |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
428 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
429 |
else |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
430 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
431 |
cqi = 1; // lowest value fro trying a transmission |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
432 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
433 |
if (cqi != 0) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
434 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
435 |
// CQI == 0 means "out of range" (see table 7.2.3-1 of 36.213) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
436 |
nflows++; |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
437 |
itLcRnti = lcActivesPerRnti.find ((*it).m_rnti); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
438 |
if (itLcRnti != lcActivesPerRnti.end ()) |
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
439 |
{ |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
440 |
(*itLcRnti).second++; |
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
441 |
} |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
442 |
else |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
443 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
444 |
lcActivesPerRnti.insert (std::pair<uint16_t, uint8_t > ((*it).m_rnti, 1)); |
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
445 |
nTbs++; |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
446 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
447 |
|
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
448 |
} |
7886 | 449 |
} |
450 |
} |
|
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
451 |
|
7886 | 452 |
if (nflows == 0) |
453 |
{ |
|
454 |
return; |
|
455 |
} |
|
456 |
// Divide the resource equally among the active users according to |
|
457 |
// Resource allocation type 0 (see sec 7.1.6.1 of 36.213) |
|
458 |
int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth); |
|
459 |
int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize; |
|
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
460 |
int rbgPerTb = rbgNum / nTbs; |
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
461 |
if (rbgPerTb == 0) |
7886 | 462 |
{ |
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
463 |
rbgPerTb = 1; // at least 1 rbg per TB (till available resource) |
7886 | 464 |
} |
465 |
int rbgAllocated = 0; |
|
466 |
||
467 |
FfMacSchedSapUser::SchedDlConfigIndParameters ret; |
|
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
468 |
// round robin assignment to all UE-LC registered starting from the subsequent of the one |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
469 |
// served last scheduling trigger |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
470 |
//NS_LOG_DEBUG (this << " next to be served " << m_nextRntiDl << " nflows " << nflows); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
471 |
if (m_nextRntiDl != 0) |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
472 |
{ |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
473 |
for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++) |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
474 |
{ |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
475 |
if ((*it).m_rnti == m_nextRntiDl) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
476 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
477 |
break; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
478 |
} |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
479 |
} |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
480 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
481 |
if (it == m_rlcBufferReq.end ()) |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
482 |
{ |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
483 |
NS_LOG_ERROR (this << " no user found"); |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
484 |
} |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
485 |
} |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
486 |
else |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
487 |
{ |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
488 |
it = m_rlcBufferReq.begin (); |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
489 |
m_nextRntiDl = (*it).m_rnti; |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
490 |
} |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
491 |
std::map <uint16_t,uint8_t>::iterator itTxMode; |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
492 |
do |
7886 | 493 |
{ |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
494 |
itLcRnti = lcActivesPerRnti.find ((*it).m_rnti); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
495 |
if (itLcRnti == lcActivesPerRnti.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
496 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
497 |
// skip this entry |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
498 |
it++; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
499 |
if (it == m_rlcBufferReq.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
500 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
501 |
// restart from the first |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
502 |
it = m_rlcBufferReq.begin (); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
503 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
504 |
continue; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
505 |
} |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
506 |
itTxMode = m_uesTxMode.find ((*it).m_rnti); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
507 |
if (itTxMode == m_uesTxMode.end()) |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
508 |
{ |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
509 |
NS_FATAL_ERROR ("No Transmission Mode info on user " << (*it).m_rnti); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
510 |
} |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
511 |
int nLayer = TransmissionModesLayers::TxMode2LayerNum ((*itTxMode).second); |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
512 |
int lcNum = (*itLcRnti).second; |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
513 |
// create new BuildDataListElement_s for this RNTI |
7886 | 514 |
BuildDataListElement_s newEl; |
515 |
newEl.m_rnti = (*it).m_rnti; |
|
516 |
// create the DlDciListElement_s |
|
517 |
DlDciListElement_s newDci; |
|
518 |
newDci.m_rnti = (*it).m_rnti; |
|
519 |
newDci.m_resAlloc = 0; |
|
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
520 |
newDci.m_rbBitmap = 0; |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
521 |
std::map <uint16_t,uint8_t>::iterator itCqi = m_p10CqiRxed.find (newEl.m_rnti); |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
522 |
for (uint8_t i = 0; i < nLayer; i++) |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
523 |
{ |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
524 |
if (itCqi == m_p10CqiRxed.end ()) |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
525 |
{ |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
526 |
newDci.m_mcs.push_back (0); // no info on this user -> lowest MCS |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
527 |
} |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
528 |
else |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
529 |
{ |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
530 |
newDci.m_mcs.push_back ( m_amc->GetMcsFromCqi ((*itCqi).second) ); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
531 |
} |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
532 |
} |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
533 |
// group the LCs of this RNTI |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
534 |
std::vector <struct RlcPduListElement_s> newRlcPduLe; |
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
535 |
// int totRbg = lcNum * rbgPerFlow; |
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
536 |
// totRbg = rbgNum / nTbs; |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
537 |
int tbSize = (m_amc->GetTbSizeFromMcs (newDci.m_mcs.at (0), rbgPerTb * rbgSize) / 8); |
8729
74de12409ee5
Update m_macChTtiDelay fixed to 4 in UL (standard) and make schedulers unaware of channel delays (tests updated according to new delay)
mmiozzo
parents:
8728
diff
changeset
|
538 |
NS_LOG_DEBUG (this << "Allocate user " << newEl.m_rnti << " LCs " << (uint16_t)(*itLcRnti).second << " bytes " << tbSize << " PRBs " << rbgAllocated * rbgSize << "..." << (rbgAllocated* rbgSize) + (rbgPerTb * rbgSize) - 1 << " mcs " << (uint16_t) newDci.m_mcs.at (0) << " layers " << nLayer); |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
539 |
uint16_t rlcPduSize = tbSize / lcNum; |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
540 |
for (int i = 0; i < lcNum ; i++) |
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
541 |
{ |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
542 |
for (uint8_t j = 0; j < nLayer; j++) |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
543 |
{ |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
544 |
RlcPduListElement_s newRlcEl; |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
545 |
newRlcEl.m_logicalChannelIdentity = (*it).m_logicalChannelIdentity; |
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
546 |
// NS_LOG_DEBUG (this << "LCID " << (uint32_t) newRlcEl.m_logicalChannelIdentity << " size " << rlcPduSize << " ID " << (*it).m_rnti << " layer " << (uint16_t)j); |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
547 |
newRlcEl.m_size = rlcPduSize; |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
548 |
UpdateDlRlcBufferInfo ((*it).m_rnti, newRlcEl.m_logicalChannelIdentity, rlcPduSize); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
549 |
newRlcPduLe.push_back (newRlcEl); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
550 |
} |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
551 |
it++; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
552 |
if (it == m_rlcBufferReq.end ()) |
8020
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
553 |
{ |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
554 |
// restart from the first |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
555 |
it = m_rlcBufferReq.begin (); |
fc705bc87348
Round Robin circular scheduling upgrade
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7983
diff
changeset
|
556 |
} |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
557 |
} |
7886 | 558 |
uint32_t rbgMask = 0; |
8342
ae80a024c11e
Bug-fix RrFfMacScheduler::DoSchedDlTriggerReq DCI TB size per multiple LCs
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8321
diff
changeset
|
559 |
for (int i = 0; i < rbgPerTb; i++) |
7886 | 560 |
{ |
561 |
rbgMask = rbgMask + (0x1 << rbgAllocated); |
|
562 |
rbgAllocated++; |
|
563 |
} |
|
564 |
newDci.m_rbBitmap = rbgMask; // (32 bit bitmap see 7.1.6 of 36.213) |
|
565 |
||
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
566 |
for (int i = 0; i < nLayer; i++) |
7886 | 567 |
{ |
7977
9a44dfd0056d
LENA-68 RrFfMacScheduler 1 TB per RNTI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7972
diff
changeset
|
568 |
newDci.m_tbsSize.push_back (tbSize); |
7886 | 569 |
newDci.m_ndi.push_back (1); // TBD (new data indicator) |
570 |
newDci.m_rv.push_back (0); // TBD (redundancy version) |
|
571 |
} |
|
572 |
newEl.m_dci = newDci; |
|
7897 | 573 |
// ...more parameters -> ignored in this version |
7886 | 574 |
|
575 |
||
7953 | 576 |
|
7886 | 577 |
|
578 |
newEl.m_rlcPduList.push_back (newRlcPduLe); |
|
579 |
ret.m_buildDataList.push_back (newEl); |
|
580 |
if (rbgAllocated == rbgNum) |
|
581 |
{ |
|
8035
d2e70680881a
LenaTestPfFfMacSchedulerSuite works with distance 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8020
diff
changeset
|
582 |
//NS_LOG_DEBUG (this << " FULL " << (*it).m_rnti); |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
583 |
m_nextRntiDl = (*it).m_rnti; // store last RNTI served |
7886 | 584 |
break; // no more RGB to be allocated |
585 |
} |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
586 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
587 |
while ((*it).m_rnti != m_nextRntiDl); |
7886 | 588 |
|
589 |
ret.m_nrOfPdcchOfdmSymbols = 1; // TODO: check correct value according the DCIs txed |
|
590 |
||
591 |
m_schedSapUser->SchedDlConfigInd (ret); |
|
592 |
return; |
|
593 |
} |
|
594 |
||
595 |
void |
|
596 |
RrFfMacScheduler::DoSchedDlRachInfoReq (const struct FfMacSchedSapProvider::SchedDlRachInfoReqParameters& params) |
|
597 |
{ |
|
598 |
NS_LOG_FUNCTION (this); |
|
599 |
// TODO: Implementation of the API |
|
600 |
return; |
|
601 |
} |
|
602 |
||
603 |
void |
|
604 |
RrFfMacScheduler::DoSchedDlCqiInfoReq (const struct FfMacSchedSapProvider::SchedDlCqiInfoReqParameters& params) |
|
605 |
{ |
|
606 |
NS_LOG_FUNCTION (this); |
|
607 |
||
608 |
std::map <uint16_t,uint8_t>::iterator it; |
|
609 |
for (unsigned int i = 0; i < params.m_cqiList.size (); i++) |
|
610 |
{ |
|
611 |
if ( params.m_cqiList.at (i).m_cqiType == CqiListElement_s::P10 ) |
|
612 |
{ |
|
613 |
// wideband CQI reporting |
|
7895
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
614 |
std::map <uint16_t,uint8_t>::iterator it; |
7886 | 615 |
uint16_t rnti = params.m_cqiList.at (i).m_rnti; |
616 |
it = m_p10CqiRxed.find (rnti); |
|
617 |
if (it == m_p10CqiRxed.end ()) |
|
618 |
{ |
|
619 |
// create the new entry |
|
620 |
m_p10CqiRxed.insert ( std::pair<uint16_t, uint8_t > (rnti, params.m_cqiList.at (i).m_wbCqi.at (0)) ); // only codeword 0 at this stage (SISO) |
|
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
621 |
// generate correspondent timer |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
622 |
m_p10CqiTimers.insert ( std::pair<uint16_t, uint32_t > (rnti, m_cqiTimersThreshold)); |
7886 | 623 |
} |
624 |
else |
|
625 |
{ |
|
626 |
// update the CQI value |
|
627 |
(*it).second = params.m_cqiList.at (i).m_wbCqi.at (0); |
|
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
628 |
// update correspondent timer |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
629 |
std::map <uint16_t,uint32_t>::iterator itTimers; |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
630 |
itTimers = m_p10CqiTimers.find (rnti); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
631 |
(*itTimers).second = m_cqiTimersThreshold; |
7886 | 632 |
} |
633 |
} |
|
7895
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
634 |
else if ( params.m_cqiList.at (i).m_cqiType == CqiListElement_s::A30 ) |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
635 |
{ |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
636 |
// subband CQI reporting high layer configured |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
637 |
// Not used by RR Scheduler |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
638 |
} |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
639 |
else |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
640 |
{ |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
641 |
NS_LOG_ERROR (this << " CQI type unknown"); |
f20bb71f9b71
Aperiodic high layer configured subband CQI (A30 type) implemented
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7888
diff
changeset
|
642 |
} |
7886 | 643 |
} |
644 |
||
645 |
return; |
|
646 |
} |
|
647 |
||
648 |
void |
|
649 |
RrFfMacScheduler::DoSchedUlTriggerReq (const struct FfMacSchedSapProvider::SchedUlTriggerReqParameters& params) |
|
650 |
{ |
|
8729
74de12409ee5
Update m_macChTtiDelay fixed to 4 in UL (standard) and make schedulers unaware of channel delays (tests updated according to new delay)
mmiozzo
parents:
8728
diff
changeset
|
651 |
NS_LOG_FUNCTION (this << " Ul - Frame no. " << (params.m_sfnSf >> 4) << " subframe no. " << (0xF & params.m_sfnSf)); |
8080
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
652 |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
653 |
|
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
654 |
RefreshUlCqiMaps (); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
655 |
|
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
656 |
std::map <uint16_t,uint32_t>::iterator it; |
7886 | 657 |
int nflows = 0; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
658 |
|
7886 | 659 |
for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) |
660 |
{ |
|
661 |
// remove old entries of this UE-LC |
|
662 |
if ((*it).second > 0) |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
663 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
664 |
nflows++; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
665 |
} |
7886 | 666 |
} |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
667 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
668 |
if (nflows == 0) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
669 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
670 |
return ; // no flows to be scheduled |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
671 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
672 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
673 |
|
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
674 |
// Divide the resource equally among the active users starting from the subsequent one served last scheduling trigger |
7886 | 675 |
int rbPerFlow = m_cschedCellConfig.m_ulBandwidth / nflows; |
676 |
if (rbPerFlow == 0) |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
677 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
678 |
rbPerFlow = 1; // at least 1 rbg per flow (till available resource) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
679 |
} |
7886 | 680 |
int rbAllocated = 0; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
681 |
|
7886 | 682 |
FfMacSchedSapUser::SchedUlConfigIndParameters ret; |
7948 | 683 |
std::vector <uint16_t> rbgAllocationMap; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
684 |
if (m_nextRntiUl != 0) |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
685 |
{ |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
686 |
for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
687 |
{ |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
688 |
if ((*it).first == m_nextRntiUl) |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
689 |
{ |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
690 |
break; |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
691 |
} |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
692 |
} |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
693 |
if (it == m_ceBsrRxed.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
694 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
695 |
NS_LOG_ERROR (this << " no user found"); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
696 |
} |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
697 |
} |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
698 |
else |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
699 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
700 |
it = m_ceBsrRxed.begin (); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
701 |
m_nextRntiUl = (*it).first; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
702 |
} |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
703 |
do |
7886 | 704 |
{ |
705 |
if (rbAllocated + rbPerFlow > m_cschedCellConfig.m_ulBandwidth) |
|
706 |
{ |
|
707 |
// limit to physical resources last resource assignment |
|
708 |
rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
|
709 |
} |
|
8264
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
710 |
|
7886 | 711 |
UlDciListElement_s uldci; |
712 |
uldci.m_rnti = (*it).first; |
|
713 |
uldci.m_rbStart = rbAllocated; |
|
714 |
uldci.m_rbLen = rbPerFlow; |
|
7948 | 715 |
std::map <uint16_t, std::vector <double> >::iterator itCqi = m_ueCqi.find ((*it).first); |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
716 |
int cqi = 0; |
7948 | 717 |
if (itCqi == m_ueCqi.end ()) |
718 |
{ |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
719 |
// no cqi info about this UE |
7948 | 720 |
uldci.m_mcs = 0; // MCS 0 -> UL-AMC TBD |
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
721 |
NS_LOG_DEBUG (this << " UE does not have ULCQI " << (*it).first ); |
7948 | 722 |
} |
723 |
else |
|
724 |
{ |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
725 |
// take the lowest CQI value (worst RB) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
726 |
double minSinr = (*itCqi).second.at (uldci.m_rbStart); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
727 |
for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_rbLen; i++) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
728 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
729 |
if ((*itCqi).second.at (i) < minSinr) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
730 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
731 |
minSinr = (*itCqi).second.at (i); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
732 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
733 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
734 |
// translate SINR -> cqi: WILD ACK: same as DL |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
735 |
double s = log2 ( 1 + ( |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
736 |
pow (10, minSinr / 10 ) / |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
737 |
( (-log (5.0 * 0.00005 )) / 1.5) )); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
738 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
739 |
|
8516
db748e56aea2
Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8513
diff
changeset
|
740 |
cqi = m_amc->GetCqiFromSpectralEfficiency (s); |
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
741 |
if (cqi == 0) |
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
742 |
{ |
8080
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
743 |
it++; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
744 |
if (it == m_ceBsrRxed.end ()) |
8080
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
745 |
{ |
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
746 |
// restart from the first |
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
747 |
it = m_ceBsrRxed.begin (); |
62d2fccef672
Refinements to RR and PF uplink scheduling
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8077
diff
changeset
|
748 |
} |
7966
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
749 |
continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 36.213) |
c2cfb1a64d66
LENA-72 CQI=0 behaviour
Marco Miozzo <marco.miozzo@cttc.es>
parents:
7953
diff
changeset
|
750 |
} |
8516
db748e56aea2
Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8513
diff
changeset
|
751 |
uldci.m_mcs = m_amc->GetMcsFromCqi (cqi); |
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
752 |
// NS_LOG_DEBUG (this << " UE " << (*it).first << " minsinr " << minSinr << " -> mcs " << (uint16_t)uldci.m_mcs); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
753 |
|
7948 | 754 |
} |
8264
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
755 |
|
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
756 |
rbAllocated += rbPerFlow; |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
757 |
// store info on allocation for managing ul-cqi interpretation |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
758 |
for (int i = 0; i < rbPerFlow; i++) |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
759 |
{ |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
760 |
rbgAllocationMap.push_back ((*it).first); |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
761 |
} |
e3a90cfb6ac2
Bug-fix LENA 172 bug on schedulers in uplink when UE has CQI = 0
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8148
diff
changeset
|
762 |
|
8516
db748e56aea2
Update RR and PF scheduler for working wiht new LteAmc object
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8513
diff
changeset
|
763 |
uldci.m_tbSize = (m_amc->GetTbSizeFromMcs (uldci.m_mcs, rbPerFlow) / 8); // MCS 0 -> UL-AMC TBD |
8729
74de12409ee5
Update m_macChTtiDelay fixed to 4 in UL (standard) and make schedulers unaware of channel delays (tests updated according to new delay)
mmiozzo
parents:
8728
diff
changeset
|
764 |
NS_LOG_DEBUG (this << " UL - UE " << (*it).first << " startPRB " << (uint32_t)uldci.m_rbStart << " nPRB " << (uint32_t)uldci.m_rbLen << " CQI " << cqi << " MCS " << (uint32_t)uldci.m_mcs << " TBsize " << uldci.m_tbSize); |
8675
e65859f03e99
Bug-fix: update m_ceBsrRxed each UL scheduling trigger event
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
765 |
UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); |
7886 | 766 |
uldci.m_ndi = 1; |
767 |
uldci.m_cceIndex = 0; |
|
768 |
uldci.m_aggrLevel = 1; |
|
769 |
uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
|
770 |
uldci.m_hopping = false; |
|
771 |
uldci.m_n2Dmrs = 0; |
|
772 |
uldci.m_tpc = 0; // no power control |
|
773 |
uldci.m_cqiRequest = false; // only period CQI at this stage |
|
774 |
uldci.m_ulIndex = 0; // TDD parameter |
|
775 |
uldci.m_dai = 1; // TDD parameter |
|
776 |
uldci.m_freqHopping = 0; |
|
777 |
uldci.m_pdcchPowerOffset = 0; // not used |
|
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
778 |
ret.m_dciList.push_back (uldci); |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
779 |
it++; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
780 |
if (it == m_ceBsrRxed.end ()) |
8077
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
781 |
{ |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
782 |
// restart from the first |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
783 |
it = m_ceBsrRxed.begin (); |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
784 |
} |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
785 |
if (rbAllocated == m_cschedCellConfig.m_ulBandwidth) |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
786 |
{ |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
787 |
// Stop allocation: no more PRBs |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
788 |
m_nextRntiUl = (*it).first; |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
789 |
break; |
6416d09febbf
RrFfMacScheduler updated to circular allocation in uplink
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8067
diff
changeset
|
790 |
} |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
791 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
792 |
while ((*it).first != m_nextRntiUl); |
7948 | 793 |
m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> > (params.m_sfnSf, rbgAllocationMap)); |
7886 | 794 |
m_schedSapUser->SchedUlConfigInd (ret); |
795 |
return; |
|
796 |
} |
|
797 |
||
798 |
void |
|
799 |
RrFfMacScheduler::DoSchedUlNoiseInterferenceReq (const struct FfMacSchedSapProvider::SchedUlNoiseInterferenceReqParameters& params) |
|
800 |
{ |
|
801 |
NS_LOG_FUNCTION (this); |
|
802 |
// TODO: Implementation of the API |
|
803 |
return; |
|
804 |
} |
|
805 |
||
806 |
void |
|
807 |
RrFfMacScheduler::DoSchedUlSrInfoReq (const struct FfMacSchedSapProvider::SchedUlSrInfoReqParameters& params) |
|
808 |
{ |
|
809 |
NS_LOG_FUNCTION (this); |
|
810 |
// TODO: Implementation of the API |
|
811 |
return; |
|
812 |
} |
|
813 |
||
814 |
void |
|
815 |
RrFfMacScheduler::DoSchedUlMacCtrlInfoReq (const struct FfMacSchedSapProvider::SchedUlMacCtrlInfoReqParameters& params) |
|
816 |
{ |
|
817 |
NS_LOG_FUNCTION (this); |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
818 |
|
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
819 |
std::map <uint16_t,uint32_t>::iterator it; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
820 |
|
7886 | 821 |
for (unsigned int i = 0; i < params.m_macCeList.size (); i++) |
822 |
{ |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
823 |
if ( params.m_macCeList.at (i).m_macCeType == MacCeListElement_s::BSR ) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
824 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
825 |
// buffer status report |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
826 |
uint16_t rnti = params.m_macCeList.at (i).m_rnti; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
827 |
it = m_ceBsrRxed.find (rnti); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
828 |
if (it == m_ceBsrRxed.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
829 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
830 |
// create the new entry |
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
831 |
uint8_t bsrId = params.m_macCeList.at (i).m_macCeValue.m_bufferStatus.at (0); |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
832 |
int buffer = BufferSizeLevelBsr::BsrId2BufferSize (bsrId); |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
833 |
m_ceBsrRxed.insert ( std::pair<uint16_t, uint32_t > (rnti, buffer)); // only 1 buffer status is working now |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
834 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
835 |
else |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
836 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
837 |
// update the CQI value |
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
838 |
(*it).second = BufferSizeLevelBsr::BsrId2BufferSize (params.m_macCeList.at (i).m_macCeValue.m_bufferStatus.at (0)); |
8497
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
839 |
// NS_LOG_DEBUG (this << " Update BSR with " << BufferSizeLevelBsr::BsrId2BufferSize (params.m_macCeList.at (i).m_macCeValue.m_bufferStatus.at (0)) << " at " << Simulator::Now ()); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
840 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
841 |
} |
7886 | 842 |
} |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
843 |
|
7886 | 844 |
return; |
845 |
} |
|
846 |
||
847 |
void |
|
848 |
RrFfMacScheduler::DoSchedUlCqiInfoReq (const struct FfMacSchedSapProvider::SchedUlCqiInfoReqParameters& params) |
|
849 |
{ |
|
850 |
NS_LOG_FUNCTION (this); |
|
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
851 |
NS_LOG_DEBUG (this << " RX SFNID " << params.m_sfnSf); |
8321
c674feef9d5f
Bug-fix UL Allocation Map storing for UL-CQI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8320
diff
changeset
|
852 |
// NS_LOG_DEBUG (this << " Actual sfn " << frameNo << " sbfn " << subframeNo << " sfnSf " << sfnSf); |
9039
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
853 |
switch (m_ulCqiFilter) |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
854 |
{ |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
855 |
case FfMacScheduler::SRS: |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
856 |
{ |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
857 |
// filter all the CQIs that are not SRS based |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
858 |
if (params.m_ulCqi.m_type!=UlCqi_s::SRS) |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
859 |
{ |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
860 |
return; |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
861 |
} |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
862 |
} |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
863 |
break; |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
864 |
case FfMacScheduler::PUSCH: |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
865 |
{ |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
866 |
// filter all the CQIs that are not SRS based |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
867 |
if (params.m_ulCqi.m_type!=UlCqi_s::PUSCH) |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
868 |
{ |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
869 |
return; |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
870 |
} |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
871 |
} |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
872 |
case FfMacScheduler::ALL: |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
873 |
break; |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
874 |
|
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
875 |
default: |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
876 |
NS_FATAL_ERROR ("Unknown UL CQI type"); |
5bdf0c1be85f
Add SRS based UL-CQI and update RR and PF schedulers for managing them
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8729
diff
changeset
|
877 |
} |
7948 | 878 |
// retrieve the allocation for this subframe |
879 |
std::map <uint16_t, std::vector <uint16_t> >::iterator itMap; |
|
880 |
std::map <uint16_t, std::vector <double> >::iterator itCqi; |
|
8729
74de12409ee5
Update m_macChTtiDelay fixed to 4 in UL (standard) and make schedulers unaware of channel delays (tests updated according to new delay)
mmiozzo
parents:
8728
diff
changeset
|
881 |
itMap = m_allocationMaps.find (params.m_sfnSf); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
882 |
if (itMap == m_allocationMaps.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
883 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
884 |
NS_LOG_DEBUG (this << " Does not find info on allocation"); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
885 |
return; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
886 |
} |
7948 | 887 |
for (uint32_t i = 0; i < (*itMap).second.size (); i++) |
888 |
{ |
|
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
889 |
// convert from fixed point notation Sxxxxxxxxxxx.xxx to double |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
890 |
double sinr = LteFfConverter::fpS11dot3toDouble (params.m_ulCqi.m_sinr.at (i)); |
8728
5a99218bfd1b
Bug-fix on m_macChTtiDelay management on UE-eNB PHY and consequently update RR-PF schedulers and tests
mmiozzo
parents:
8726
diff
changeset
|
891 |
// NS_LOG_DEBUG (this << " RB " << i << "UE " << (*itMap).second.at (i) << " SINRfp " << params.m_ulCqi.m_sinr.at (i) << " sinrdb " << sinr); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
892 |
itCqi = m_ueCqi.find ((*itMap).second.at (i)); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
893 |
if (itCqi == m_ueCqi.end ()) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
894 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
895 |
// create a new entry |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
896 |
std::vector <double> newCqi; |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
897 |
for (uint32_t j = 0; j < m_cschedCellConfig.m_ulBandwidth; j++) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
898 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
899 |
if (i == j) |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
900 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
901 |
newCqi.push_back (sinr); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
902 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
903 |
else |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
904 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
905 |
// initialize with maximum value according to the fixed point notation |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
906 |
newCqi.push_back (30.0); |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
907 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
908 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
909 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
910 |
m_ueCqi.insert (std::pair <uint16_t, std::vector <double> > ((*itMap).second.at (i), newCqi)); |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
911 |
// generate correspondent timer |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
912 |
m_ueCqiTimers.insert (std::pair <uint16_t, uint32_t > ((*itMap).second.at (i), m_cqiTimersThreshold)); |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
913 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
914 |
else |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
915 |
{ |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
916 |
// update the value |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
917 |
(*itCqi).second.at (i) = sinr; |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
918 |
// update correspondent timer |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
919 |
std::map <uint16_t, uint32_t>::iterator itTimers; |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
920 |
itTimers = m_ueCqiTimers.find ((*itMap).second.at (i)); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
921 |
(*itTimers).second = m_cqiTimersThreshold; |
8148
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
922 |
} |
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
923 |
|
09e2d03022a2
run check-style on src/lte/model
Nicola Baldo <nbaldo@cttc.es>
parents:
8086
diff
changeset
|
924 |
} |
7948 | 925 |
// remove obsolete info on allocation |
8321
c674feef9d5f
Bug-fix UL Allocation Map storing for UL-CQI
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8320
diff
changeset
|
926 |
m_allocationMaps.erase (itMap); |
7948 | 927 |
|
7886 | 928 |
return; |
929 |
} |
|
930 |
||
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
931 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
932 |
void |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
933 |
RrFfMacScheduler::RefreshDlCqiMaps(void) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
934 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
935 |
NS_LOG_FUNCTION (this << m_p10CqiTimers.size ()); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
936 |
// refresh DL CQI P01 Map |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
937 |
std::map <uint16_t,uint32_t>::iterator itP10 = m_p10CqiTimers.begin (); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
938 |
while (itP10!=m_p10CqiTimers.end ()) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
939 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
940 |
NS_LOG_INFO (this << " P10-CQI for user " << (*itP10).first << " is " << (uint32_t)(*itP10).second << " thr " << (uint32_t)m_cqiTimersThreshold); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
941 |
if ((*itP10).second == 0) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
942 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
943 |
// delete correspondent entries |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
944 |
std::map <uint16_t,uint8_t>::iterator itMap = m_p10CqiRxed.find ((*itP10).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
945 |
NS_ASSERT_MSG (itMap != m_p10CqiRxed.end (), " Does not find CQI report for user " << (*itP10).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
946 |
NS_LOG_INFO (this << " P10-CQI exired for user " << (*itP10).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
947 |
m_p10CqiRxed.erase (itMap); |
8584
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
948 |
std::map <uint16_t,uint32_t>::iterator temp = itP10; |
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
949 |
itP10++; |
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
950 |
m_p10CqiTimers.erase (temp); |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
951 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
952 |
else |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
953 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
954 |
(*itP10).second--; |
8584
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
955 |
itP10++; |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
956 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
957 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
958 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
959 |
return; |
7886 | 960 |
} |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
961 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
962 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
963 |
void |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
964 |
RrFfMacScheduler::RefreshUlCqiMaps(void) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
965 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
966 |
// refresh UL CQI Map |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
967 |
std::map <uint16_t,uint32_t>::iterator itUl = m_ueCqiTimers.begin (); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
968 |
while (itUl!=m_ueCqiTimers.end ()) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
969 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
970 |
NS_LOG_INFO (this << " UL-CQI for user " << (*itUl).first << " is " << (uint32_t)(*itUl).second << " thr " << (uint32_t)m_cqiTimersThreshold); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
971 |
if ((*itUl).second == 0) |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
972 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
973 |
// delete correspondent entries |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
974 |
std::map <uint16_t, std::vector <double> >::iterator itMap = m_ueCqi.find ((*itUl).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
975 |
NS_ASSERT_MSG (itMap != m_ueCqi.end (), " Does not find CQI report for user " << (*itUl).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
976 |
NS_LOG_INFO (this << " UL-CQI exired for user " << (*itUl).first); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
977 |
(*itMap).second.clear (); |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
978 |
m_ueCqi.erase (itMap); |
8584
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
979 |
std::map <uint16_t,uint32_t>::iterator temp = itUl; |
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
980 |
itUl++; |
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
981 |
m_ueCqiTimers.erase (temp); |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
982 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
983 |
else |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
984 |
{ |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
985 |
(*itUl).second--; |
8584
188a9d439fd8
Soved valgrind error on CQI updates in RR and PF schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8538
diff
changeset
|
986 |
itUl++; |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
987 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
988 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
989 |
|
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
990 |
return; |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
991 |
} |
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
992 |
|
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
993 |
void |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
994 |
RrFfMacScheduler::UpdateDlRlcBufferInfo (uint16_t rnti, uint8_t lcid, uint16_t size) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
995 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
996 |
std::list<FfMacSchedSapProvider::SchedDlRlcBufferReqParameters>::iterator it; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
997 |
for (it = m_rlcBufferReq.begin (); it != m_rlcBufferReq.end (); it++) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
998 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
999 |
if (((*it).m_rnti == rnti) && ((*it).m_logicalChannelIdentity)) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1000 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1001 |
// NS_LOG_DEBUG (this << " UE " << rnti << " LC " << (uint16_t)lcid << " txqueue " << (*it).m_rlcTransmissionQueueSize << " retxqueue " << (*it).m_rlcRetransmissionQueueSize << " status " << (*it).m_rlcStatusPduSize << " decrease " << size); |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1002 |
// Update queues: RLC tx order Status, ReTx, Tx |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1003 |
// Update status queue |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1004 |
if ((*it).m_rlcStatusPduSize <= size) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1005 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1006 |
size -= (*it).m_rlcStatusPduSize; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1007 |
(*it).m_rlcStatusPduSize = 0; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1008 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1009 |
else |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1010 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1011 |
(*it).m_rlcStatusPduSize -= size; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1012 |
return; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1013 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1014 |
// update retransmission queue |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1015 |
if ((*it).m_rlcRetransmissionQueueSize <= size) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1016 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1017 |
size -= (*it).m_rlcRetransmissionQueueSize; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1018 |
(*it).m_rlcRetransmissionQueueSize = 0; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1019 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1020 |
else |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1021 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1022 |
(*it).m_rlcRetransmissionQueueSize -= size; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1023 |
return; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1024 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1025 |
// update transmission queue |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1026 |
if ((*it).m_rlcTransmissionQueueSize <= size) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1027 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1028 |
size -= (*it).m_rlcTransmissionQueueSize; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1029 |
(*it).m_rlcTransmissionQueueSize = 0; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1030 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1031 |
else |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1032 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1033 |
(*it).m_rlcTransmissionQueueSize -= size; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1034 |
return; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1035 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1036 |
return; |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1037 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1038 |
} |
8311
ec257b681d85
Address LENA-173: CQI refresh procedure introduced in Pf and Rr schedulers
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8264
diff
changeset
|
1039 |
} |
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1040 |
|
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1041 |
void |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1042 |
RrFfMacScheduler::UpdateUlRlcBufferInfo (uint16_t rnti, uint16_t size) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1043 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1044 |
|
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1045 |
|
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1046 |
std::map <uint16_t,uint32_t>::iterator it = m_ceBsrRxed.find (rnti); |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1047 |
if (it!=m_ceBsrRxed.end ()) |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1048 |
{ |
8497
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1049 |
// NS_LOG_DEBUG (this << " Update RLC BSR UE " << rnti << " size " << size << " BSR " << (*it).second); |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1050 |
if ((*it).second >= size) |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1051 |
{ |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1052 |
(*it).second -= size; |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1053 |
} |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1054 |
else |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1055 |
{ |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1056 |
(*it).second = 0; |
b06cd67bc6ba
Update RR and PF scheduler for updating BSR queues avoiding overflows
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8435
diff
changeset
|
1057 |
} |
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1058 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1059 |
else |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1060 |
{ |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1061 |
NS_LOG_ERROR (this << " Does not find BSR report info of UE " << rnti); |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1062 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1063 |
|
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1064 |
} |
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1065 |
|
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1066 |
|
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1067 |
void |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1068 |
RrFfMacScheduler::TransmissionModeConfigurationUpdate (uint16_t rnti, uint8_t txMode) |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1069 |
{ |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1070 |
NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1071 |
FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1072 |
params.m_rnti = rnti; |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1073 |
params.m_transmissionMode = txMode; |
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1074 |
m_cschedSapUser->CschedUeConfigUpdateInd (params); |
8435
6b0542a91970
Transmission queue head-of-line delay and queue size at MAC Scheduler
mmiozzo
parents:
8413
diff
changeset
|
1075 |
} |
8714
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1076 |
|
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1077 |
|
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1078 |
|
398bbcbb3f42
Add MIMO model, test and documentation
Marco Miozzo <marco.miozzo@cttc.es>
parents:
8584
diff
changeset
|
1079 |
} |