arch/x86/include/asm/mtrr.h
changeset 2 d1f6d8b6f81c
parent 0 aa628870c1d3
equal deleted inserted replaced
1:0056487c491e 2:d1f6d8b6f81c
    21       Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
    21       Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
    22 */
    22 */
    23 #ifndef _ASM_X86_MTRR_H
    23 #ifndef _ASM_X86_MTRR_H
    24 #define _ASM_X86_MTRR_H
    24 #define _ASM_X86_MTRR_H
    25 
    25 
       
    26 #include <linux/types.h>
    26 #include <linux/ioctl.h>
    27 #include <linux/ioctl.h>
    27 #include <linux/errno.h>
    28 #include <linux/errno.h>
    28 
    29 
    29 #define	MTRR_IOCTL_BASE	'M'
    30 #define	MTRR_IOCTL_BASE	'M'
    30 
    31 
    54     unsigned int size;    /*  Size of region   */
    55     unsigned int size;    /*  Size of region   */
    55     unsigned int regnum;   /*  Register number  */
    56     unsigned int regnum;   /*  Register number  */
    56     unsigned int type;     /*  Type of region   */
    57     unsigned int type;     /*  Type of region   */
    57 };
    58 };
    58 #endif /* !__i386__ */
    59 #endif /* !__i386__ */
       
    60 
       
    61 struct mtrr_var_range {
       
    62 	__u32 base_lo;
       
    63 	__u32 base_hi;
       
    64 	__u32 mask_lo;
       
    65 	__u32 mask_hi;
       
    66 };
       
    67 
       
    68 /* In the Intel processor's MTRR interface, the MTRR type is always held in
       
    69    an 8 bit field: */
       
    70 typedef __u8 mtrr_type;
       
    71 
       
    72 #define MTRR_NUM_FIXED_RANGES 88
       
    73 #define MTRR_MAX_VAR_RANGES 256
       
    74 
       
    75 struct mtrr_state_type {
       
    76 	struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
       
    77 	mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
       
    78 	unsigned char enabled;
       
    79 	unsigned char have_fixed;
       
    80 	mtrr_type def_type;
       
    81 };
       
    82 
       
    83 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
       
    84 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
    59 
    85 
    60 /*  These are the various ioctls  */
    86 /*  These are the various ioctls  */
    61 #define MTRRIOC_ADD_ENTRY        _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry)
    87 #define MTRRIOC_ADD_ENTRY        _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry)
    62 #define MTRRIOC_SET_ENTRY        _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry)
    88 #define MTRRIOC_SET_ENTRY        _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry)
    63 #define MTRRIOC_DEL_ENTRY        _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry)
    89 #define MTRRIOC_DEL_ENTRY        _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry)