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1 #ifndef __SPI_BITBANG_H |
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2 #define __SPI_BITBANG_H |
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3 |
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4 /* |
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5 * Mix this utility code with some glue code to get one of several types of |
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6 * simple SPI master driver. Two do polled word-at-a-time I/O: |
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7 * |
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8 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](), |
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9 * expanding the per-word routines from the inline templates below. |
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10 * |
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11 * - Drivers for controllers resembling bare shift registers. Provide |
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12 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods |
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13 * that use your controller's clock and chipselect registers. |
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14 * |
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15 * Some hardware works well with requests at spi_transfer scope: |
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16 * |
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17 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half |
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18 * duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(), |
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19 * and custom setup()/cleanup() methods. |
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20 */ |
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21 |
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22 #include <linux/workqueue.h> |
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23 |
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24 struct spi_bitbang { |
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25 struct workqueue_struct *workqueue; |
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26 struct work_struct work; |
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27 |
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28 spinlock_t lock; |
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29 struct list_head queue; |
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30 u8 busy; |
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31 u8 use_dma; |
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32 u8 flags; /* extra spi->mode support */ |
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33 |
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34 struct spi_master *master; |
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35 |
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36 /* setup_transfer() changes clock and/or wordsize to match settings |
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37 * for this transfer; zeroes restore defaults from spi_device. |
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38 */ |
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39 int (*setup_transfer)(struct spi_device *spi, |
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40 struct spi_transfer *t); |
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41 |
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42 void (*chipselect)(struct spi_device *spi, int is_on); |
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43 #define BITBANG_CS_ACTIVE 1 /* normally nCS, active low */ |
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44 #define BITBANG_CS_INACTIVE 0 |
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45 |
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46 /* txrx_bufs() may handle dma mapping for transfers that don't |
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47 * already have one (transfer.{tx,rx}_dma is zero), or use PIO |
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48 */ |
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49 int (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t); |
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50 |
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51 /* txrx_word[SPI_MODE_*]() just looks like a shift register */ |
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52 u32 (*txrx_word[4])(struct spi_device *spi, |
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53 unsigned nsecs, |
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54 u32 word, u8 bits); |
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55 }; |
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56 |
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57 /* you can call these default bitbang->master methods from your custom |
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58 * methods, if you like. |
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59 */ |
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60 extern int spi_bitbang_setup(struct spi_device *spi); |
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61 extern void spi_bitbang_cleanup(struct spi_device *spi); |
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62 extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m); |
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63 extern int spi_bitbang_setup_transfer(struct spi_device *spi, |
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64 struct spi_transfer *t); |
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65 |
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66 /* start or stop queue processing */ |
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67 extern int spi_bitbang_start(struct spi_bitbang *spi); |
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68 extern int spi_bitbang_stop(struct spi_bitbang *spi); |
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69 |
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70 #endif /* __SPI_BITBANG_H */ |
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71 |
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72 /*-------------------------------------------------------------------------*/ |
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73 |
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74 #ifdef EXPAND_BITBANG_TXRX |
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75 |
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76 /* |
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77 * The code that knows what GPIO pins do what should have declared four |
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78 * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX |
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79 * and including this header: |
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80 * |
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81 * void setsck(struct spi_device *, int is_on); |
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82 * void setmosi(struct spi_device *, int is_on); |
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83 * int getmiso(struct spi_device *); |
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84 * void spidelay(unsigned); |
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85 * |
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86 * A non-inlined routine would call bitbang_txrx_*() routines. The |
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87 * main loop could easily compile down to a handful of instructions, |
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88 * especially if the delay is a NOP (to run at peak speed). |
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89 * |
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90 * Since this is software, the timings may not be exactly what your board's |
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91 * chips need ... there may be several reasons you'd need to tweak timings |
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92 * in these routines, not just make to make it faster or slower to match a |
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93 * particular CPU clock rate. |
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94 */ |
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95 |
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96 static inline u32 |
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97 bitbang_txrx_be_cpha0(struct spi_device *spi, |
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98 unsigned nsecs, unsigned cpol, |
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99 u32 word, u8 bits) |
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100 { |
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101 /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ |
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102 |
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103 /* clock starts at inactive polarity */ |
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104 for (word <<= (32 - bits); likely(bits); bits--) { |
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105 |
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106 /* setup MSB (to slave) on trailing edge */ |
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107 setmosi(spi, word & (1 << 31)); |
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108 spidelay(nsecs); /* T(setup) */ |
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109 |
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110 setsck(spi, !cpol); |
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111 spidelay(nsecs); |
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112 |
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113 /* sample MSB (from slave) on leading edge */ |
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114 word <<= 1; |
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115 word |= getmiso(spi); |
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116 setsck(spi, cpol); |
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117 } |
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118 return word; |
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119 } |
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120 |
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121 static inline u32 |
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122 bitbang_txrx_be_cpha1(struct spi_device *spi, |
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123 unsigned nsecs, unsigned cpol, |
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124 u32 word, u8 bits) |
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125 { |
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126 /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ |
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127 |
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128 /* clock starts at inactive polarity */ |
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129 for (word <<= (32 - bits); likely(bits); bits--) { |
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130 |
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131 /* setup MSB (to slave) on leading edge */ |
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132 setsck(spi, !cpol); |
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133 setmosi(spi, word & (1 << 31)); |
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134 spidelay(nsecs); /* T(setup) */ |
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135 |
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136 setsck(spi, cpol); |
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137 spidelay(nsecs); |
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138 |
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139 /* sample MSB (from slave) on trailing edge */ |
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140 word <<= 1; |
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141 word |= getmiso(spi); |
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142 } |
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143 return word; |
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144 } |
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145 |
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146 #endif /* EXPAND_BITBANG_TXRX */ |