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1 /* |
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2 * include/linux/atmel_serial.h |
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3 * |
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4 * Copyright (C) 2005 Ivan Kokshaysky |
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5 * Copyright (C) SAN People |
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6 * |
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7 * USART registers. |
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8 * Based on AT91RM9200 datasheet revision E. |
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9 * |
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10 * This program is free software; you can redistribute it and/or modify |
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11 * it under the terms of the GNU General Public License as published by |
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12 * the Free Software Foundation; either version 2 of the License, or |
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13 * (at your option) any later version. |
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14 */ |
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15 |
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16 #ifndef ATMEL_SERIAL_H |
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17 #define ATMEL_SERIAL_H |
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18 |
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19 #define ATMEL_US_CR 0x00 /* Control Register */ |
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20 #define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */ |
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21 #define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */ |
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22 #define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */ |
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23 #define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */ |
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24 #define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */ |
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25 #define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */ |
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26 #define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */ |
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27 #define ATMEL_US_STTBRK (1 << 9) /* Start Break */ |
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28 #define ATMEL_US_STPBRK (1 << 10) /* Stop Break */ |
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29 #define ATMEL_US_STTTO (1 << 11) /* Start Time-out */ |
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30 #define ATMEL_US_SENDA (1 << 12) /* Send Address */ |
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31 #define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */ |
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32 #define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */ |
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33 #define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */ |
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34 #define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */ |
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35 #define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */ |
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36 #define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */ |
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37 #define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */ |
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38 |
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39 #define ATMEL_US_MR 0x04 /* Mode Register */ |
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40 #define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */ |
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41 #define ATMEL_US_USMODE_NORMAL 0 |
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42 #define ATMEL_US_USMODE_RS485 1 |
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43 #define ATMEL_US_USMODE_HWHS 2 |
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44 #define ATMEL_US_USMODE_MODEM 3 |
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45 #define ATMEL_US_USMODE_ISO7816_T0 4 |
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46 #define ATMEL_US_USMODE_ISO7816_T1 6 |
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47 #define ATMEL_US_USMODE_IRDA 8 |
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48 #define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */ |
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49 #define ATMEL_US_USCLKS_MCK (0 << 4) |
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50 #define ATMEL_US_USCLKS_MCK_DIV8 (1 << 4) |
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51 #define ATMEL_US_USCLKS_SCK (3 << 4) |
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52 #define ATMEL_US_CHRL (3 << 6) /* Character Length */ |
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53 #define ATMEL_US_CHRL_5 (0 << 6) |
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54 #define ATMEL_US_CHRL_6 (1 << 6) |
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55 #define ATMEL_US_CHRL_7 (2 << 6) |
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56 #define ATMEL_US_CHRL_8 (3 << 6) |
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57 #define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */ |
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58 #define ATMEL_US_PAR (7 << 9) /* Parity Type */ |
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59 #define ATMEL_US_PAR_EVEN (0 << 9) |
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60 #define ATMEL_US_PAR_ODD (1 << 9) |
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61 #define ATMEL_US_PAR_SPACE (2 << 9) |
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62 #define ATMEL_US_PAR_MARK (3 << 9) |
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63 #define ATMEL_US_PAR_NONE (4 << 9) |
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64 #define ATMEL_US_PAR_MULTI_DROP (6 << 9) |
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65 #define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */ |
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66 #define ATMEL_US_NBSTOP_1 (0 << 12) |
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67 #define ATMEL_US_NBSTOP_1_5 (1 << 12) |
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68 #define ATMEL_US_NBSTOP_2 (2 << 12) |
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69 #define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */ |
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70 #define ATMEL_US_CHMODE_NORMAL (0 << 14) |
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71 #define ATMEL_US_CHMODE_ECHO (1 << 14) |
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72 #define ATMEL_US_CHMODE_LOC_LOOP (2 << 14) |
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73 #define ATMEL_US_CHMODE_REM_LOOP (3 << 14) |
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74 #define ATMEL_US_MSBF (1 << 16) /* Bit Order */ |
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75 #define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */ |
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76 #define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */ |
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77 #define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */ |
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78 #define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */ |
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79 #define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */ |
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80 #define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */ |
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81 #define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */ |
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82 |
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83 #define ATMEL_US_IER 0x08 /* Interrupt Enable Register */ |
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84 #define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */ |
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85 #define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */ |
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86 #define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */ |
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87 #define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */ |
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88 #define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */ |
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89 #define ATMEL_US_OVRE (1 << 5) /* Overrun Error */ |
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90 #define ATMEL_US_FRAME (1 << 6) /* Framing Error */ |
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91 #define ATMEL_US_PARE (1 << 7) /* Parity Error */ |
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92 #define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */ |
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93 #define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */ |
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94 #define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */ |
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95 #define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */ |
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96 #define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */ |
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97 #define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */ |
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98 #define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */ |
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99 #define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */ |
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100 #define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */ |
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101 #define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */ |
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102 #define ATMEL_US_RI (1 << 20) /* RI */ |
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103 #define ATMEL_US_DSR (1 << 21) /* DSR */ |
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104 #define ATMEL_US_DCD (1 << 22) /* DCD */ |
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105 #define ATMEL_US_CTS (1 << 23) /* CTS */ |
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106 |
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107 #define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */ |
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108 #define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */ |
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109 #define ATMEL_US_CSR 0x14 /* Channel Status Register */ |
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110 #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ |
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111 #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ |
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112 #define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [AT91SAM9261 only] */ |
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113 |
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114 #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ |
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115 #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ |
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116 |
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117 #define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */ |
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118 #define ATMEL_US_TO (0xffff << 0) /* Time-out Value */ |
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119 |
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120 #define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */ |
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121 #define ATMEL_US_TG (0xff << 0) /* Timeguard Value */ |
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122 |
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123 #define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */ |
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124 #define ATMEL_US_NER 0x44 /* Number of Errors Register */ |
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125 #define ATMEL_US_IF 0x4c /* IrDA Filter Register */ |
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126 |
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127 #endif |