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1 #ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H |
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2 #define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H |
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3 |
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4 /* |
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5 * This file copes with machines that wakeup secondary CPUs by the |
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6 * INIT, INIT, STARTUP sequence. |
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7 */ |
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8 |
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9 #define WAKE_SECONDARY_VIA_INIT |
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10 |
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11 #define TRAMPOLINE_LOW phys_to_virt(0x467) |
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12 #define TRAMPOLINE_HIGH phys_to_virt(0x469) |
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13 |
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14 #define boot_cpu_apicid boot_cpu_physical_apicid |
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15 |
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16 static inline void wait_for_init_deassert(atomic_t *deassert) |
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17 { |
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18 while (!atomic_read(deassert)) |
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19 cpu_relax(); |
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20 return; |
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21 } |
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22 |
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23 /* Nothing to do for most platforms, since cleared by the INIT cycle */ |
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24 static inline void smp_callin_clear_local_apic(void) |
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25 { |
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26 } |
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27 |
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28 static inline void store_NMI_vector(unsigned short *high, unsigned short *low) |
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29 { |
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30 } |
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31 |
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32 static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) |
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33 { |
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34 } |
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35 |
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36 #define inquire_remote_apic(apicid) do { \ |
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37 if (apic_verbosity >= APIC_DEBUG) \ |
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38 __inquire_remote_apic(apicid); \ |
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39 } while (0) |
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40 |
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41 #endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */ |