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1 #ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H |
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2 #define _ASM_X86_MACH_DEFAULT_MACH_APIC_H |
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3 |
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4 #ifdef CONFIG_X86_LOCAL_APIC |
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5 |
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6 #include <mach_apicdef.h> |
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7 #include <asm/smp.h> |
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8 |
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9 #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
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10 |
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11 static inline cpumask_t target_cpus(void) |
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12 { |
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13 #ifdef CONFIG_SMP |
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14 return cpu_online_map; |
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15 #else |
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16 return cpumask_of_cpu(0); |
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17 #endif |
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18 } |
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19 |
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20 #define NO_BALANCE_IRQ (0) |
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21 #define esr_disable (0) |
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22 |
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23 #ifdef CONFIG_X86_64 |
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24 #include <asm/genapic.h> |
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25 #define INT_DELIVERY_MODE (genapic->int_delivery_mode) |
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26 #define INT_DEST_MODE (genapic->int_dest_mode) |
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27 #define TARGET_CPUS (genapic->target_cpus()) |
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28 #define apic_id_registered (genapic->apic_id_registered) |
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29 #define init_apic_ldr (genapic->init_apic_ldr) |
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30 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
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31 #define phys_pkg_id (genapic->phys_pkg_id) |
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32 #define vector_allocation_domain (genapic->vector_allocation_domain) |
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33 #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) |
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34 #define send_IPI_self (genapic->send_IPI_self) |
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35 extern void setup_apic_routing(void); |
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36 #else |
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37 #define INT_DELIVERY_MODE dest_LowestPrio |
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38 #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ |
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39 #define TARGET_CPUS (target_cpus()) |
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40 /* |
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41 * Set up the logical destination ID. |
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42 * |
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43 * Intel recommends to set DFR, LDR and TPR before enabling |
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44 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
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45 * document number 292116). So here it goes... |
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46 */ |
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47 static inline void init_apic_ldr(void) |
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48 { |
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49 unsigned long val; |
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50 |
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51 apic_write(APIC_DFR, APIC_DFR_VALUE); |
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52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
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53 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); |
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54 apic_write(APIC_LDR, val); |
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55 } |
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56 |
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57 static inline int apic_id_registered(void) |
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58 { |
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59 return physid_isset(read_apic_id(), phys_cpu_present_map); |
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60 } |
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61 |
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62 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) |
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63 { |
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64 return cpus_addr(cpumask)[0]; |
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65 } |
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66 |
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67 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
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68 { |
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69 return cpuid_apic >> index_msb; |
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70 } |
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71 |
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72 static inline void setup_apic_routing(void) |
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73 { |
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74 #ifdef CONFIG_X86_IO_APIC |
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75 printk("Enabling APIC mode: %s. Using %d I/O APICs\n", |
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76 "Flat", nr_ioapics); |
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77 #endif |
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78 } |
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79 |
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80 static inline int apicid_to_node(int logical_apicid) |
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81 { |
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82 #ifdef CONFIG_SMP |
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83 return apicid_2_node[hard_smp_processor_id()]; |
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84 #else |
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85 return 0; |
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86 #endif |
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87 } |
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88 |
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89 static inline cpumask_t vector_allocation_domain(int cpu) |
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90 { |
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91 /* Careful. Some cpus do not strictly honor the set of cpus |
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92 * specified in the interrupt destination when using lowest |
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93 * priority interrupt delivery mode. |
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94 * |
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95 * In particular there was a hyperthreading cpu observed to |
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96 * deliver interrupts to the wrong hyperthread when only one |
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97 * hyperthread was specified in the interrupt desitination. |
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98 */ |
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99 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; |
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100 return domain; |
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101 } |
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102 #endif |
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103 |
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104 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
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105 { |
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106 return physid_isset(apicid, bitmap); |
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107 } |
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108 |
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109 static inline unsigned long check_apicid_present(int bit) |
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110 { |
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111 return physid_isset(bit, phys_cpu_present_map); |
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112 } |
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113 |
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114 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) |
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115 { |
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116 return phys_map; |
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117 } |
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118 |
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119 static inline int multi_timer_check(int apic, int irq) |
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120 { |
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121 return 0; |
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122 } |
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123 |
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124 /* Mapping from cpu number to logical apicid */ |
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125 static inline int cpu_to_logical_apicid(int cpu) |
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126 { |
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127 return 1 << cpu; |
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128 } |
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129 |
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130 static inline int cpu_present_to_apicid(int mps_cpu) |
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131 { |
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132 if (mps_cpu < NR_CPUS && cpu_present(mps_cpu)) |
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133 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); |
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134 else |
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135 return BAD_APICID; |
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136 } |
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137 |
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138 static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) |
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139 { |
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140 return physid_mask_of_physid(phys_apicid); |
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141 } |
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142 |
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143 static inline void setup_portio_remap(void) |
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144 { |
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145 } |
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146 |
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147 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) |
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148 { |
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149 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); |
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150 } |
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151 |
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152 static inline void enable_apic_mode(void) |
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153 { |
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154 } |
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155 #endif /* CONFIG_X86_LOCAL_APIC */ |
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156 #endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */ |